DLA DSCC-VID-V62 04654 REV A-2008 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS HEX BUFFERS DRIVERS WITH OPEN-DRAIN OUTPUTS MONOLITHIC SILICON《单片硅六缓冲器 驱动器带漏极开路输出低压CMOS数字微电路》.pdf

《DLA DSCC-VID-V62 04654 REV A-2008 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS HEX BUFFERS DRIVERS WITH OPEN-DRAIN OUTPUTS MONOLITHIC SILICON《单片硅六缓冲器 驱动器带漏极开路输出低压CMOS数字微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA DSCC-VID-V62 04654 REV A-2008 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS HEX BUFFERS DRIVERS WITH OPEN-DRAIN OUTPUTS MONOLITHIC SILICON《单片硅六缓冲器 驱动器带漏极开路输出低压CMOS数字微电路》.pdf（12页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02. - phn 08-08-04 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV A A A A A A A A A A A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SU

2、PPLY CENTER, COLUMBUS COLUMBUS, OHIO Original date of drawing CHECKED BY Charles F. Saffle APPROVED BY Thomas M. Hess TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS, MONOLITHIC SILICON SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04654 YY-MM-DD 04-02-24 REV A

3、PAGE 1 OF 12 AMSC N/A 5962-V058-08 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requi

4、rements of a high performance hex buffers/drivers with open-drain outputs microcircuit, with an operating temperature range of -40C to +85C for device type 01 and an extended operating temperature range of -55C to +125C for device type 02. 1.2 Vendor Item Drawing Administrative Control Number. The m

5、anufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04654 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type

6、(s). Device type Generic Circuit function 01 SN74LVC07A-EP Hex buffers/drivers with open-drain outputs 02 SN74LVC07A-EP Hex buffers/drivers with open-drain outputs 1.2.2 Case outline. The case outline is as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 MO-153 Plasti

7、c small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Provided by IHSNot for ResaleNo reproduction or net

8、working permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 6.5 V Input voltage range (VI). -0.5 V to 6.5 V 2/ Output voltage range (VO

9、) . -0.5 V to 6.5 V Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50 mA Continuous output current (IO). 50 mA Continuous current through VCCor GND. 100 mA Package thermal impedance (JA): 3/ X package . 113C/W Storage temperature range (TSTG). -65C to 150C 1.4 Recommend

10、ed operating conditions. 4/ Supply voltage range (VCC) . 1.65 V to 5.5 V Minimum high level input voltage (VIH): VCC= 1.65 V to 1.95 V 0.65 x VCCVCC= 2.3 V to 2.7 V 1.7 V VCC= 2.7 V to 3.6 V 2.0 V VCC= 4.5 V to 5.5 V 0.7 x VCCMaximum low level input voltage (VIL): VCC= 1.65 V to 1.95 V 0.35 x VCCVCC

11、= 2.3 V to 2.7 V 0.7 V VCC= 2.7 V to 3.6 V 0.8 V VCC= 4.5 V to 5.5 V 0.3 x VCCInput voltage range (VI). 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to 5.5 V Maximum low level output current (IOL): VCC= 1.65 V 4 mA VCC= 2.3 V 12 mA VCC= 2.7 V 12 mA VCC= 3.0 V 24 mA VCC= 4.5 V 24 mA Operating fre

12、e-air temperature range (TA): Device type 01. -40C to +85C Device type 02. -55C to +125C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions b

13、eyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observ

14、ed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, CO

15、LUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copie

16、s should be addressed to the Electronic Industry Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers

17、name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and

18、electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figu

19、re 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing wavef

20、orms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Limits T

21、est Symbol Conditions 2/ Device type: All VCCMin Max Unit IOL= 100 A 1.65 V to 5.5 V 0.2 IOL= 4 mA 1.65 V 0.45 IOL= 12 mA 2.3 V 0.7 IOL= 12 mA 2.7 V 0.4 Low level output voltage VOLIOL= 24 mA 3.0 V 0.55 V Input current IIVI= 5.5 V or GND 3.6 V 5 A Quiescent supply current ICCVI= VCCor GND IO= 0 A 3.

22、6 V 10 A Quiescent supply current delta ICCOne input at VCC 0.6 V, Other inputs at VCCor GND 2.7 V to 3.6 V 500 A Input capacitance CiVI= VCCor GND, TA= 25C 3.3 V 5 TYP pF 1.8 V 1.8 TYP 2.5 V 2 TYP 3.3 V 2.5 TYP Power dissipation capacitance per buffer/driver Cpdf = 10 MHz, TA= 25C 5.0 V 3.78 TYP pF

23、 1.8 V 0.15 V 1 6.6 2.5 V 0.2 V 1 4.4 2.7 V 4.3 3.3 V 0.3 V 1 4.6 Propagation delay time, A to Y tpdSee figure 5. 5.0 V 0.5 V 1 3.6 ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product m

24、ay not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Over recommended operating conditions, unless otherwise noted. Provided

25、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 6 Case X Dimensions Millimeters Inches Millimeters Inches Symbol Min Max Min Max Symbol Min Max Min Max A

26、- 1.20 - 0.047 E 4.30 4.50 0.169 0.177 A1 0.05 0.15 0.002 0.006 E1 6.20 6.60 0.244 0.260 b 0.19 0.30 0.007 0.012 e 0.65 BSC 0.026 BSC c 0.15 NOM 0.006 NOM L 0.50 0.75 0.020 0.030 D 4.90 5.10 0.193 0.201 NOTES: 1. All linear dimensions are in millimeters (inches). 2. This case outline is subject to c

27、hange without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters (0.006 in). 4. Fall within JEDEC MO-153. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER,

28、COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 7 (each buffer/driver) Input Output A Y H H L L H = High voltage level L = Low voltage level FIGURE 2. Truth table. FIGURE 3. Logic diagram. Case outline X Terminal number Terminal symbol Terminal number Terminal symbol

29、 1 1A 8 4Y 2 1Y 9 4A 3 2A 10 5Y 4 2Y 11 5A 5 3A 12 6Y 6 3Y 13 6A 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654

30、REV A PAGE 8 VCC= 1.8 V 0.15 V NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except wh

31、en disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 , tr 2 ns, tf 2 ns. 4. The outputs are measured one at a time with one input transition per measurement. 5. Since this device has open-drain outputs, tPLZand tPZ

32、Lare the same as tpd. 6. tPZLis measured at VCC/2. 7. tPLZis measured at VOL+ 0.15 V. 8. All parameters and waveforms are not applicable to all devices. FIGURE 5. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFE

33、NSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 9 VCC= 2.5 V 0.2 V NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Wave

34、form 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 , tr 2 ns, tf 2 ns. 4. The outputs are measured one at a time with one in

35、put transition per measurement. 5. Since this device has open-drain outputs, tPLZand tPZLare the same as tpd. 6. tPZLis measured at VCC/2. 7. tPLZis measured at VOL+ 0.15 V. 8. All parameters and waveforms are not applicable to all devices. FIGURE 5. Test circuit and timing waveforms - Continued. Pr

36、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 10 VCC= 2.7 V and 3.3 V 0.3 V NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for a

37、n output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. 3. All input pulses are supplied by generators having the followin

38、g characteristics: PRR 10 MHz, ZO= 50 , tr 2 ns, tf 2 ns. 4. The outputs are measured one at a time with one input transition per measurement. 5. Since this device has open-drain outputs, tPLZand tPZLare the same as tpd. 6. tPZLis measured at VCC/2. 7. tPLZis measured at VOL+ 0.15 V. 8. All paramete

39、rs and waveforms are not applicable to all devices. FIGURE 5. Test circuit and timing waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654

40、REV A PAGE 11 VCC= 5 V 0.5 V NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when

41、 disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 , tr 2 ns, tf 2 ns. 4. The outputs are measured one at a time with one input transition per measurement. 5. Since this device has open-drain outputs, tPLZand tPZLa

42、re the same as tpd. 6. tPZLis measured at VCC/2. 7. tPLZis measured at VOL+ 0.15 V. 8. All parameters and waveforms are not applicable to all devices. FIGURE 5. Test circuit and timing waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

43、S-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04654 REV A PAGE 12 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such

44、procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers

45、standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufac

46、turers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or contin

47、ued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top side marking V62/04654-01XE 01295 SN74LVC07AIPWREP C07AEP V62/04654-02XE 01295 SN74LVC07AMPWREP C07AMEP 1/ The vendor item drawing establishe

48、s an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or netwo