DLA DSCC-DWG-04030-2005 SEMICONDUCTOR DEVICE TRANSISTOR NPN SILICON HIGH POWER TYPE 2N5926《2N5926高功率型 硅NPN晶体管半导体器件》.pdf
《DLA DSCC-DWG-04030-2005 SEMICONDUCTOR DEVICE TRANSISTOR NPN SILICON HIGH POWER TYPE 2N5926《2N5926高功率型 硅NPN晶体管半导体器件》.pdf》由会员分享,可在线阅读,更多相关《DLA DSCC-DWG-04030-2005 SEMICONDUCTOR DEVICE TRANSISTOR NPN SILICON HIGH POWER TYPE 2N5926《2N5926高功率型 硅NPN晶体管半导体器件》.pdf(11页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME-14.100 Selected item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGES 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Roger Kissel DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OH http:/www.dscc.dla.mil/programs/milspec/docsea
2、rch.asp Original date of drawing CHECKED BY Alan Barone TITLE SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, HIGH POWER TYPE 2N5926 14 March 2005 APPROVED BY Thomas Hess SIZE A CODE IDENT. NO. 037Z3 DWG NO. 04030 REV PAGE 1 OF 11 AMSC N/A 5961-E075 MIL-S-19500/447 has been cancelled. This drawing m
3、ay be used as a substitute. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 037Z3 DWG NO. 04030 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing describes the requirements for NPN, silic
4、on, high-power transistors. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 04030 - 01 NONTX, TX, TXV | | | Drawing number Device type Quality Level 1/ 1.2.1 Device types. The device types identify the quality assurance level of the devices as follo
5、ws: Device type 1/ Figure number Package 04030-01 1 Stud 04030-01TX 1 Stud 04030-01TXV 1 Stud 1.3 Maximum rating. TC= +25C unless otherwise specified. PT (1)PT (1)VCEOVCBOVEBOIC (2)IBTJRJCTC= +25C TC= +100C and TSTGW W V dc V dc V dc A dc A dc C C/W 350 200 120 150 10 50 20 -65 to +200 0.5 (1) Betwe
6、en TC= +25C and TC= +200C, linear derating factor (average) = 2.0W/C. (2) Pulsed (see 4.4.1) = 90A.1.4 Primary electrical characteristics. hFE(1) VBE(1) VCE(sat)(1) IC= 20 A dc VCE= 2 V dc IC= 50 A dc VCE= 2 V dc IC = 90 A dc VCE = 4 V dc IC= 50 A dc VCE= 2 V dc IC= 90 A dc VCE= 4 V dc IC= 50 A dc I
7、B= 5 A dc IC= 90 A dc IB= 18 A dc Min 20 Max 80 Min 10 Max 40 Min 5 Max 1.2 Max 2.5 Max 0.6 V dc Max 1.5 V dc (1) Pulsed (see 4.4.1). Limits RJC|hfe| VCE= 10 V dc tontstfC/W IC= 5 A dc f = 100 KHz IC= 50 A dc Min 5 Max .5 20 7.0 s 4.0 s 6.0 s 1/ Quality level: non-TX (-01, no suffix), -01TX, and -01
8、TXV levels correspond to JAN, JANTX, and JANTXV equivalent quality requirements in MIL-PRF-19500. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 037Z3 DWG NO. 04030 REV PAGE 3 2. A
9、PPLICABLE DOCUMENTS 2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has bee
10、n made to ensure the completeness of this list, document users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications, standards, and handbooks. The f
11、ollowing specifications, standards, and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-19500 - Semiconductor Devices, Genera
12、l Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Build
13、ing 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exe
14、mption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-19500 and as specified herein. 3.1.1 Device capability. The devices must be capable of meeting the following MIL-STD-750 test conditions: Step Method Condition 1 3053
15、 Load condition C (unclamped inductive load), TC= +25C, single 10 ms pulse, tr= tf 1s, RBB1= 1, RBB2= , VBB1= 6.2 V dc, VBB2= 0 V dc, IC= 50 A dc, VCC= 25 V dc, L = 5mH. See 3.1.2. Endpoints: Group A, subgroup 2. 2 3053 Load condition B (clamped switching Destructive), TA= +25C, single 2 ms pulse, t
16、r= tf 1s, RBB1= 1, RBB2= 20, VBB1= 6.2 V dc, VBB2= 3 V dc, IC= 50 A dc, VCLAMP= 125 V dc, L = 68H, RL= 0, clamping diode 2N5926 with emitter shorted to base. Device fails if clamp voltage is not reached. See 3.1.2. Endpoints: Group A, subgroup 2. 3 3051 TC= 100C, t = 1 s, 1 cycle, see 3.1.2 and figu
17、re 2. Test 1 - VCE= 4 V dc, IC= 50 A dc Test 2 - VCE= 50 V dc, IC= 4 A dc Test 3 - VCE= 120 V dc, IC= 850 mA dc 4 3131 IMmeasurement 10 mA. VCEmeasurement voltage . 25 V. IHcollector heating current . 10 A. VHcollector-emitter heating voltage . 20 V. tHheating time. steady-state (see method 3131 of
18、MIL-STD-750 for definition). tMDmeasurement delay time . 20s maximum. tSWsample window time 10s maximum. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 037Z3 DWG NO. 04030 REV PAGE
19、 4 3.1.2 Safe Operating Area (DC Operation) test. Each transistor shall sustain the applicable test conditions and the following acceptance criteria shall apply: (a) IC(for each transistor) shall not vary more than 10% during the dc operation; and (b) All other specified end-point test(s) limits sha
20、ll not be exceeded, after the dc-operation test. (c) Correlation note: satisfactory endurance of the transistors throughout tests 1, 2, and 3 respectively (paragraph 3.1.1, step 3) is directly associable with ascertainment of the safe operating area for the transistors as illustrated in the nomograp
21、h of figure 2. 3.2 Abbreviations, symbol, and definitions. Abbreviations, symbols, and definitions used herein shall be as specified in MIL-PRF-19500. 3.3 Interface and physical dimensions. The interface and physical dimensions shall be as specified in MIL-PRF-19500 and figure 1 herein. 3.3.1 Lead f
22、inish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein. 3.3.2 Internal construction. Multiple chip construction shall not be permitted. 3.4 Marking. Marking shall be in accordance with MIL-PRF-19500. 3.5 Manufacturer eligibility. To be eligible to supply dev
23、ices to this drawing, the manufacturer shall perform conformance inspection in accordance with the procuring activitys testing requirements as specified in 4.2 and 4.3 herein. Devices specified herein shall meet traceability as specified in MIL-PRF-19500. It is prohibited for a manufacturer not list
24、ed as an approved source to mark devices with this drawing number. 3.5.1 Certificate of compliance. A certificate of compliance shall be required from manufacturers requesting to be an approved source of supply. 3.5.2 Certificate of conformance. A certificate of conformance shall be provided with ea
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