DLA SMD-5962-99607 REV J-2009 MICROCIRCUIT MEMORY DIGITAL CMOS 512K x 8-BIT RADIATION-HARDENED LOW VOLTAGE SRAM MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added Q level parts to drawing. Corrections to paragraph 1.5. Footnote changes to Table 1, including removal of footnote 8 . - glg 00-03-20 Raymond Monnin B Added case outline X to drawing. Corrected E1 terminal symbol to E. Corrected table 1 foo
2、tnotes. Corrections to figure 4. Added 10 second data retention table to figure 5. - glg 00-05-25 Raymond Monnin C Corrections to paragraph 1.5 and addition of footnote. Corrections to sheet 16, 1 second data retention test table. - glg 00-08-31 Raymond Monnin D Boilerplate update, added appendix B
3、for die. ksr 01-05-04 Raymond Monnin E Corrected CAGE code typo, 67264 changed to 67268. Updated boilerplate. ksr 02-03-18 Raymond Monnin F Add 02 device representing an extended temperature device. Corrected (SEP) effective with no latch-up in paragraph 1.5; was 90.5 MeV-cm2/mg changed to 80 MeV-cm
4、2/mg ksr 02-11-04 Raymond Monnin G Added devices 03 and 04, updated Table I. ksr 02-12-08 Raymond Monnin H Boilerplate update and part of five year review. tcr 07-12-13 Robert M. Heber J Added devices 05 and 06; added case outline Y, and updated Table I. Added additional die information to appendix
5、B. Made corrections to case U dimension table. ksr 09-08-13 Charles F. Saffle REV J J J J J J J SHEET 35 36 37 38 39 40 41 REV J J J J J J J J J J J J J J J J J J J J SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV J J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4
6、5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, MEMORY, DIGI
7、TAL, CMOS, 512K x 8-BIT, RADIATION-HARDENED, LOW VOLTAGE SRAM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 99-09-28 AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 67268 5962-99607 SHEET 1 OF 41 DSCC FORM 2233 APR 97 5962-E500-08 Provided by IHSNot for ResaleNo repr
8、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consis
9、ting of high reliability (device classes Q and M), space application (device class V), and for appropriate satellite and similar applications (device class T). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choic
10、e of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class T, the user is encouraged to review the manufacturers Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended application. 1.2 PIN. The PIN shall be as sh
11、own in the following example: 5962 L 99607 01 T X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q, T and V RHA marked dev
12、ices shall meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 De
13、vice types. The device types shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01 8Q512 512K X 8-bit rad-hard low voltage SRAM (MIL Temp) 25 ns 02 8Q512 512K X 8-bit rad-hard low voltage SRAM (Extended Temp) 25 ns 03 8Q512 512K X 8-bit rad-hard l
14、ow voltage SRAM (MIL Temp) 20 ns 04 8Q512 512K X 8-bit rad-hard low voltage SRAM (Extended Temp) 20 ns 05 8Q512E 512K X 8-bit rad-hard low voltage SRAM (MIL Temp) 20 ns 06 8Q512E 512K X 8-bit rad-hard low voltage SRAM (Extended Temp) 20 ns 1.2.3 Device class designator. The device class designator s
15、hall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q, V Certification an
16、d qualification to MIL-PRF-38535 T Certification and qualification to MIL-PRF-38535 with performance as specified in the device manufacturers approved quality management plan 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive
17、designator Terminals Package style U See figure 1 36 Flat pack X See figure 1 36 Flat pack Y See figure 1 36 Flat pack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38535 for classes Q, T and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo rep
18、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range, (VDD) . -0.5 V dc to +4.6 V
19、 dc Voltage range on any input pin -0.5 V dc to +4.6 V dc Voltage range on any output pin -0.5 V dc to +4.6 V dc Input current, dc . + 10 mA Power dissipation . 1.0 W Operating case temperature range, (TC) (Device 01, 03, and 05) . -55C to +125C Operating case temperature range, (TC) (Device 02, 04,
20、 and 06) . -40C to +125C Storage temperature range, (TSTG) -65C to +150C Junction temperature, (TJ) . +150C Thermal resistance, junction-to-case, (JC): Case X, Y, and U +10C/W 1.4 Recommended operating conditions. Supply voltage range, (VDD) . +3.0 V dc to +3.6 V dc Supply voltage, (VSS) . 0 V dc In
21、put voltage, dc 0 V dc to VDDOperating case temperature, (TC) (Device 01, 03, and 05) . -55C to +125C Operating case temperature, (TC) (Device 02, 04, and 06) . -40C to +125C 1.5 Radiation features Maximum total dose available (dose rate = 3 rads(Si)/s) 50 x 103 rads(Si) Single event phenomenon (SEP
22、) effective linear energy threshold (LET) with no upsets (devices 01 -04) . 1 MeV-cm2/mg 3/ with no latch-up (devices 01 -04) 80 MeV-cm2/mg 3/ linear energy threshold (LET) with no upsets (devices 05 and 06) . 2.8 MeV-cm2/mg 4/ with no latch-up (devices 05 and 06) . 110 MeV-cm2/mg 4/ 1.6 Digital log
23、ic testing for device classes T, Q, and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, method 5012) . 100 percent 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawin
24、g to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883
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