DLA SMD-5962-96535 REV F-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED DUAL D FLIP-FLOP WITH CLEAR AND PRESET TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-96535 REV F-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED DUAL D FLIP-FLOP WITH CLEAR AND PRESET TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96535 REV F-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED DUAL D FLIP-FLOP WITH CLEAR AND PRESET TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(27页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R142-97. 96-12-10 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-09-04 Thomas M. Hess C Correct the title to accurately describe the device function. Add d
2、evice types 02 and 03. Add appendix A. Change figure 4, switching waveforms and test circuit. Update boilerplate to the latest MIL-PRF-38535 requirements. - jak 07-12-13 Thomas M. Hess D Add note 9/ to section 1.5 for device types 02 and 03. Add footnote 6/ to table IB and remove table III, Irradiat
3、ion test connections. - jak 08-05-05 Thomas M. Hess E Correct terminal connections for pin number 8, 9 and 10 in figure 1 and update boilerplate to current MIL-PRF-38535 requirements. Add information to footnote 6/ in section 1.5.- MAA 08-10-17 Thomas M. Hess F Add equivalent test circuit and footno
4、te 5 in figure 4. Update radiation features in section 1.5 and SEP table IB - MAA 12-05-10 Thomas M. Hess REV SHEET REV F F F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh
5、V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Monica L. Poelking MICROCIRCUIT, DI
6、GITAL, ADVANCED CMOS, RADIATION HARDENED, DUAL D FLIP-FLOP WITH CLEAR AND PRESET, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-12 REVISION LEVEL F SIZE A CAGE CODE 67268 5962-96535 SHEET 1 OF 25 DSCC FORM 2233 APR 97 5962-E293-12Provided by IHSNot for ResaleNo reproduction o
7、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96535 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliabil
8、ity (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is
9、 as shown in the following example 5962 H 96535 02 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked d
10、evices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device typ
11、e(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACTS74 Radiation hardened, dual D flip-flop with clear and preset, TTL compatible inputs 02 54ACTS74E Enhanced radiation hardened, dual D flip-flop with clear and preset, TTL compatibl
12、e inputs 03 54ACTS74E Enhanced radiation hardened, dual D flip-flop with clear and preset, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor s
13、elf-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline l
14、etter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Dual flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo
15、reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96535 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD): Device type 01 . -0.3 V
16、dc to +7.0 V dc Device type 02 and 03 . -0.3 V dc to +6.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -6
17、5C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC): Case outline C . See MIL-STD-1835 Case outline X . 15.5C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device type 02 and 03 . 3.2 W 4/ 1.4 Recommen
18、ded operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device type 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum inpu
19、t rise or fall time rate at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ 1.5 Radiation features. Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105Rads (Si) Device type 02 (effective dose rate = 1 rad (Si)/s) . 1 x 106Rads (Si) 6/ Device type 03 (dose rate = 50 300 rads (Si)/s)
20、 5 x 105Rads (Si) Single event phenomenon (SEP) : Device type 01: No SEU at effective linear energy transfer (LET) (see 4.4.4.4) . 80 MeV-cm2/mg 8/ 7/ No SEL at effective linear energy transfer (LET) (see 4.4.4.4) 120 MeV-cm2/mg 8/ 7/ Device types 02 and 03: No SEU at effective linear energy transfe
21、r (LET) (see 4.4.4.4) . 108 MeV-cm2/mg 8/ 7/ No SEL at effective linear energy transfer (LET) (see 4.4.4.4) 120 MeV-cm2/mg 8/ 7/ Dose rate upset (20 ns pulse) 1 x 109 Rads (Si)/s 8/ 9/ Dose rate latch-up . None 8/ Dose rate survivability . 1 x 1012 Rads (Si)/s 8/ 1/ Stresses above the absolute maxim
22、um rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS.3/ The limits for the parameters specified herein shall apply over the full specified VDDrang
23、e and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ (max) - TC(max). JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Device type 02 is irradiated at dose ra
24、te = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specificati
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