DLA SMD-5962-93187 REV L-2007 MICROCIRCUIT HYBRID DIGITAL STATIC RANDOM ACCESS MEMORY CMOS 128K X 32-BIT《128K X 32位静态随机存取存储器 氧化物半导体数字混合微型电路》.pdf
《DLA SMD-5962-93187 REV L-2007 MICROCIRCUIT HYBRID DIGITAL STATIC RANDOM ACCESS MEMORY CMOS 128K X 32-BIT《128K X 32位静态随机存取存储器 氧化物半导体数字混合微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-93187 REV L-2007 MICROCIRCUIT HYBRID DIGITAL STATIC RANDOM ACCESS MEMORY CMOS 128K X 32-BIT《128K X 32位静态随机存取存储器 氧化物半导体数字混合微型电路》.pdf(34页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added device type 10. Redrew entire document. 95-07-07 K. A. Cottongim B Corrected true dimensioning table and removed dimensions A2 and F in figure 1. Changed dimension A min from 0.185 inches to 0.180 inches for case outlines U and Y. Changes d
2、imension A min from 0.210 inches to 0.200 inches for case outlines T and X. Added vendor CAGE code 88379 for device types 01 through 10. Made editorial changes throughout. 95-10-18 K. A. Cottongim C Added case outlines M, N, 4, and 5. Redrew entire document. 96-11-20 K. A. Cottongim D Table I, chang
3、ed the maximum limit for the supply current 32-bit mode test (ICC32) from 440 to 520 for device types 05 and 06, and from 500 to 520 for device types 07 and 08. -sld 97-09-08 K. A. Cottongim E Figure 1: For case outlines 4 and 5 changed the dimension D3 min and max limits to 1.020 and 1.060 inches.
4、For case outlines 4 and 5 changed dimension A min limit to .135 inches. For case outlines 4 and 5 changed dimension L min limit to .132 inches. -sld 98-04-06 K. A. Cottongim F Table I; changed the max limit for ICC32for device types 05, 06, 07, and 08 from 520 mA to 600 mA. Changed the max limit for
5、 ICCDR1for device types 05 through 10 from 10.4 mA to 11.6 mA. -sld 98-07-13 K. A. Cottongim G Added device type 11. Added vendor CAGE 0EU86 for device types 05 through 09. -sld 99-08-27 Raymond Monnin H Figure 1; changed the maximum limit for dimension D3 from 1.060 inches to 1.086 inches for case
6、outlines 4 and 5. -sld 00-02-07 Raymond Monnin J Added note to paragraph 1.2.2 and table I regarding the 4 transistor design. Added footnote 3 for case outlines U, T, X, and Y on the bulletin page. Redrew entire document. -sld 00-11-14 Raymond Monnin K Added device types 12 through 18. -sld 01-11-13
7、 Raymond Monnin L Updated drawing. -gz 07-04-16 Robert M. Heber REV SHEET REV L L L L L L L L L L L L SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV L L L L L L L L L L L L L L OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUM
8、BUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil/ APPROVED BY Kendall A. Cottongim MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DE
9、PARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-06-24 AMSC N/A REVISION LEVEL L SIZE A CAGE CODE 67268 5962-93187 SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E344-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-
10、93187 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and
11、 are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 93187 01 H M X Federal RHA Device Device Case Lead stock class designator type class o
12、utline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash
13、 (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 1/ Generic number Circuit function Access time 01 WS128K32-120HQ, ACT-S128K32-120PQ SRAM, 128K x 32-bit 120 ns 02 WS128K32-100HQ, ACT-S128K32-100PQ SRAM, 128K x 32-bit 100
14、ns 03 WS128K32-85HQ, ACT-S128K32-85PQ SRAM, 128K x 32-bit 85 ns 04 WS128K32-70HQ, ACT-S128K32-70PQ SRAM, 128K x 32-bit 70 ns 05,12 WS128K32-55HQ, ACT-S128K32-55PQ, SRAM, 128K x 32-bit 55 ns AS8S128K32P-55 06,13 WS128K32-45HQ, ACT-S128K32-45PQ, SRAM, 128K x 32-bit 45 ns AS8S128K32P-45 07,14 WS128K32-
15、35HQ, ACT-S128K32-35PQ, SRAM, 128K x 32-bit 35 ns AS8S128K32P-35 08,15 WS128K32-25HQ, ACT-S128K32-25PQ, SRAM, 128K x 32-bit 25 ns AS8S128K32P-25 09,16 WS128K32-20HQ, ACT-S128K32-20PQ, SRAM, 128K x 32-bit 20 ns AS8S128K32P-20 10,17 WS128K32-17HQ, ACT-S128K32-17PQ, SRAM, 128K x 32-bit 17 ns AS8S128K32
16、P-17 11,18 WS128K32-15HQ SRAM, 128K x 32-bit 15 ns _ 1/ Due to the nature of the 4 transistor design of the die in these device types, topologically pure testing is important, particularly for high reliability applications. The device manufacturer should be consulted concerning their testing methods
17、 and algorithms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93187 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 3 DSCC FORM 2234 APR 97 1.2.3 Device class designator. Th
18、is device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as foll
19、ows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced tes
20、ting version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B,
21、C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the excep
22、tion(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1
23、835 and as follows: 1/ Outline letter Descriptive designator Terminals Package style M See figure 1 66 Hex-in-line, single cavity, without standoffs N See figure 1 66 Hex-in-line, single cavity, without standoffs T See figure 1 66 Hex-in-line, single cavity, with standoffs U See figure 1 66 Hex-in-l
24、ine, single cavity, without standoffs X See figure 1 66 Hex-in-line, single cavity, with standoffs Y See figure 1 66 Hex-in-line, single cavity, without standoffs 4 See figure 1 66 Hex-in-line, single cavity, with standoffs 5 See figure 1 66 Hex-in-line, single cavity, with standoffs 1.2.5 Lead fini
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