DLA SMD-5962-92312 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 4MEG X 4 DRAM MONOLITHIC SILICON《硅单片 4M X 4动态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf
《DLA SMD-5962-92312 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 4MEG X 4 DRAM MONOLITHIC SILICON《硅单片 4M X 4动态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-92312 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 4MEG X 4 DRAM MONOLITHIC SILICON《硅单片 4M X 4动态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf(35页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update and part of five year review. tcr 06-07-05 Raymond Monnin REV SHEET REV A A A A A A A A A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV A A A A A A A A A A A A A A OF SHE
2、ETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIR
3、CUIT, MEMORY, DIGITAL, CMOS 4MEG X 4 DRAM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-10-18 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-92312 SHEET 1 OF 34 DSCC FORM 2233 APR 97 5962-E463-06 Provided by IHSNot for ResaleNo reproduction or networki
4、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92312 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliabili
5、ty (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is
6、 as shown in the following example: 5962 - 92312 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked de
7、vices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type
8、(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 416400-10 4 M x 4 DYNAMIC RAM, 32 ms refresh 100 ns 02 416400-80 4 M x 4 DYNAMIC RAM, 32 ms refresh 80 ns 03 416400-70 4 M x 4 DYNAMIC RAM, 32 ms refresh 70 ns 1.2.3 Device
9、 class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-P
10、RF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 28 flat pack Y See figure 1 28 leadless chip carrier
11、Z See figure 1 24 zig-zag in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this docu
12、ment and will also be listed in MIL-HDBK-103 and QML-38535 (see 6.6.2 herein). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92312 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A S
13、HEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ Voltage range on any pin .-1 V dc to 7 V dc Voltage range on VCC.-1 V dc to 7 V dc Short circuit output current.50 mA Maximum power dissipation (PD) .1 W Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds).+30
14、0C Thermal resistance, junction-to-case (JC) Case outlines X, Y, Z 15C/W 3/ Junction temperature (TJ) 4/+175C 1.4 Recommended operating conditions. Supply voltage range (VCC) 5/ .+4.5 V dc to +5.5 V dc High-level input voltage (VIH)2.4 V dc minimum to 6.5 V dc maximum Low-level input voltage (VIL) 6
15、/-1.0 V dc minimum to 0.8 V dc maximum Case operating temperature range (TC) .-55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwi
16、se specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-18
17、35 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.
18、daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliabili
19、ty. 3/ When the thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5
20、/ All voltage values in this drawing are with respect to VSS. 6/ The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used in this drawing for logic voltage levels only. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic
21、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92312 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless other
22、wise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arli
23、ngton, VA 22201; http:/www.jedec.org.) AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addr
24、essed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in o
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