DLA SMD-5962-89823 REV H-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 9000栅可编程逻辑阵列 数字记忆微型电路》.pdf
《DLA SMD-5962-89823 REV H-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 9000栅可编程逻辑阵列 数字记忆微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-89823 REV H-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 9000栅可编程逻辑阵列 数字记忆微型电路》.pdf(37页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Redrawn with changes. Converted drawing to one part-one part number SMD format. Corrected art work for Y and Z packages. 92-11-16 M.A. Frye C Redrawn with changes. Added devices 03 and 04. Changes to paragraph 4.2.1. Changes to table I and table
2、IIA. Changed the max lead thickness on case outline Z. 93-09-10 M.A. Frye D Added case outlines U and T. Made format changes, editorial changes throughout. 94-01-27 M.A. Frye E Changes in accordance with NOR 5962-R198-95. 95-10-05 M.A. Frye F Changes in accordance with NOR 5962-R005-97. 96-10-04 Ray
3、mond Monnin G Updated drawing to current requirements. Editorial changes throughout. - gap 01-11-09 Raymond Monnin H Boilerplate update, part of 5 year review. ksr 07-04-27 Robert M. Heber REV H H SHET 35 36 REV H H H H H H H H H H H H H H H H H H H H SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28
4、29 30 31 32 33 34 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVA
5、ILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Mike Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-11-08 MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 67268 5962-89823 SHEET 1 OF 36 DSCC
6、FORM 2233 APR 97 5962-E313-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89823 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope.
7、This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of R
8、adiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 89823 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (
9、see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with th
10、e appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Toggle Speed 01 3090-50 16 x 20 9000 gate programmable array 50 MHz 02 3090-70 16 x 20 9000 gate program
11、mable array 70 MHz 03 3090-100 16 x 20 9000 gate programmable array 100 MHz 04 3090-125 16 x 20 9000 gate programmable array 125 MHz 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements docu
12、mentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 a
13、nd as follows: Outline letter Descriptive designator Terminals Package style X CMGA8-PN 175 1/ Pin grid array package Y See figure 1 164 Quad flat package Z See figure 1 164 Quad flat package U See figure 1 164 Quad flat package T See figure 1 164 Quad flat package 1.2.5 Lead finish. The lead finish
14、 is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ 175 = actual number of pins used, not maximum listed in MIL-STD-1835 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC
15、UIT DRAWING SIZE A 5962-89823 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ Supply voltage range to ground potential (VCC) -0.5 V dc to +7.0 V dc DC input voltage range. -0.5 V dc to VCC+0.5 V dc Voltage appli
16、ed to three-state output(VTS) -0.5 V dc to VCC+0.5 V dc Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC): Case outline X See MIL-STD-1835 Case outlines Y, Z, U, T . 20C/W 3/ Junction temperature (TJ). +150C 4/ Storage temperature range -65C to +150C 1.4 Reco
17、mmended operating conditions. 5/ Case operating temperature Range(TC). -55C to +125C Supply voltage relative to ground(VCC) . +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND) . 0 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specificati
18、on, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specific
19、ation for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Co
20、pies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part o
21、f this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to th
22、e Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through librari
23、es or other informational services.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ When a thermal resistance for this case is specified in MIL-STD-1835 that value s
24、hall supersede the value indicated herein. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ All voltage values in this drawing are with respect to VSS. Provided by IHSNot for Resal
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