BS QC 790101-1992 Harmonized system of quality assessment for electronic components Semiconductor devices Integrated circuits Sectional specification for semiconductor integrated c.pdf

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1、BRITISH STANDARD BS QC 790101: 1992 IEC 748-11-1: 1992 Harmonized system of quality assessment for electronic components Semiconductor devices Integrated circuits Sectional specification for semiconductor integrated circuits excluding hybrid circuits Section 1: Internal visual examination for semico

2、nductor integrated circuits excluding hybrid circuits NOTEThis British Standard should be used in conjunction with BSQC790100:1991.BS QC 790101:1992 This British Standard, having been prepared under the directionof the Electronic Components Standards Policy Committee, was published underthe authorit

3、y of the Standards Board and comes intoeffect on 15August1992 BSI 08-1999 The following BSI references relate to the work on this standard: Committee reference ECL/24 Draft for comment 85/23858 DC ISBN 0 580 21094 4 Committees responsible for this British Standard The preparation of this British Sta

4、ndard was entrusted by the Electronic Components Standards Policy Committee (ECL/-) to Technical Committee ECL/24, upon which the following bodies were represented: Electronic Components Industry Federation GAMBICA (BEAMA Ltd.) Ministry of Defence National Supervising Inspectorate Society of British

5、 Aerospace Companies Ltd. Amendments issued since publication Amd. No. Date CommentsBSQC790101:1992 BSI 08-1999 i Contents Page Committees responsible Inside front cover National foreword ii 1 Scope and object 1 2 Apparatus 1 3 Procedure for integrated circuits 1 3.0 Introduction 1 3.1 Test conditio

6、ns 3 3.2 Specified conditions 8 Figure 3 Scratch criteria 9 Figure 4 MOS scratch and void criteria 10 Figure 5 Termination ends 11 Figure 6 Void criteria 12 Figure 7 Bonding pad areas 13 Figure 8 MOS gate alignment 14 Figure 9 Diffusion faults 15 Figure 10 Passivation faults 15 Figure 11 Scribing an

7、d die defects 16 Figure 12 Bond dimensions 17 Figure 13 Bonds at metallization exit 18 Figure 14 Build-up of die attach material 19 Figure 15 Laser-trimmed glassivation defects 20 Figure 16 Dielectric isolation defects 21 Figure 17 Thin film resistor contact area 22 Figure 18 Scratch and void criter

8、ia for untrimmed resistors 23 Figure 19 Laser-trimmed thin film resisters 24 Figure 20 Scratch and void criteria for trimmed resistors 25 Figure 21 Block resistor criteria 26 List of references Inside back coverBS QC 790101:1992 ii BSI 08-1999 National foreword This British Standard has been prepare

9、d under the direction of the Electronic Components Standards Policy Committee. It is identical with IEC748-11-1:1992 (QC 790101) Semiconductor devices. Integrated circuits Part 11: Sectional specification for semiconductor integrated circuits excluding hybrid circuits Section1: Internal visual exami

10、nation for semiconductor integrated circuits excluding hybrid circuits, published by the International Electrotechnical Commission (IEC) and is a harmonized specification within the IECQ system of quality assessment for electronic components. The standard is a supplement to IEC748-11:1990 (BS QC7901

11、00:1991). A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. Cross-reference International S

12、tandard Corresponding British Standard IEC 748-11:1990 (QC 790100) BS QC 790100:1991 Semiconductor devices. Sectional specification for semiconductor integrated circuits excluding hybrid circuits (Identical) Summary of pages This document comprises a front cover, an inside front cover, pagesi andii,

13、 pages1 to26, an inside back cover and a back cover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSQC790101:1992 BSI 08-1999 1 1 Scope and object The purpose of these tests is to

14、 check the internal materials, construction and workmanship of integrated circuits for compliance with the requirements of the applicable specification. These tests will normally be used prior to capping or encapsulation on a100 % inspection basis to detect and eliminate devices with internal defect

15、s that could lead to device failure in normal application. They may also be employed on a sampling basis prior to capping to determine the effectiveness of the manufacturers quality control and handling procedures for semiconductor devices. 2 Apparatus The apparatus for this test shall include optic

16、al equipment capable of the specified magnification(s) and any visual standards (gauges, drawings, photographs, etc.) necessary to perform an effective examination and enable the operator to make objective decisions as to the acceptability of the device being examined. Adequate fixturing shall be pr

17、ovided for handling devices during examination to promote efficient operation without inflicting damage to the units. 3 Procedure for integrated circuits 3.0 Introduction 3.0.1 General The device shall be examined in a suitable sequence of observations within the specified magnification range to det

18、ermine compliance with the requirements of the applicable specification and the criteria of the specified test condition. The inspections and criteria in this method shall be required as inspections for all devices and locations to which they are applicable. Where the criterion is intended for a spe

19、cific device, process or technology, this is indicated. Complex devices may require the substitution of alternative screening procedures for visual examination criteria pertaining to metal coverage, oxide and diffusion faults that are difficult or impractical to perform. These alternative screening

20、methods and procedures are documented in the applicable detail specification and their use shall be on an optional basis. The requirements are applicable to technologies with line widths down to24m. 3.0.2 Sequence of inspection The order in which criteria are presented is not a required order of exa

21、mination and may be varied at the discretion of the manufacturer. Visual criteria specified in3.1.1.2, 3.1.1.5, 3.1.1.7, 3.1.2, items 5) and 6) of3.1.7, 3.1.8, items 1), 2) and4) of3.1.9 may be examined prior to die attachment without required reexamination after die attachment. The visual criteria

22、specified in3.1.6.2 and3.1.6.3 may be examined prior to bonding without reexamination after bonding. The visual criteria specified in3.1.1.1 and3.1.3 may be examined prior to die attachment at high magnification provided they are reexamined after die attachment at low magnification. When inverted mo

23、unting techniques are employed, the inspection criteria contained herein that cannot be checked after mounting shall be checked prior to attachment of the die. Devices which fail any test criteria herein are defective devices. They shall be rejected and removed at the time of observation. 3.0.3 Air

24、cleanliness classes The two classes defined by this specification are shown below. Classifications are based on particle count with a maximum allowable number of particles0,54m and larger, or5,04m and larger per unit volume. Particle size is expressed as the apparent maximum linear dimension or the

25、diameter of the particle. One of the following particle counting methods shall be employed on the site in use: 1) For particle sizes0,54m and larger, equipment employing light scattering principles shall be used. 2) For particle sizes5,04m and larger, microscopic counting of particles collected on a

26、 membrane filter, through which a sample of air has been drawn, may be used. 3) Other monitoring methods and equipment may be used only if demonstrated to be of an accuracy and repeatability equal to those methods listed above. Manual microscopic methods are adequate for monitoring air in the3500 cl

27、ass. Particle counts are to be taken at specified intervals during work activity periods at a location which will yield the particle count of the air in the proximity of the work location. The preferred location for the particle count is at work level height with the sampling probe pointed into the

28、air stream. 3.0.3.1 Class 3,5 Particle count not to exceed a total of3,5 particles of0,54m per litre and larger or0,35 particle of54m and larger per litre.BS QC 790101:1992 2 BSI 08-1999 3.0.3.2 Class 3 500 Particle count not to exceed a total of3500 particles of0,54m per litre and larger or25 parti

29、cles of54m and larger per litre. 3.0.4 Inspection control In all cases, examination prior to final preseal inspection shall be performed under the same quality program that is required at the final preseal inspection station. Care shall be exercised after inspections per3.0.2 to ensure that defects

30、created during subsequent handling will be detected and rejected at final preseal inspection. During the time interval between visual inspection and preparation for sealing, devices shall be stored in a controlled environment. 3.0.5 Magnification High magnification inspection shall be performed perp

31、endicular to the die surface with normal light incidence. Low magnification inspection shall be performed with either a monocular, binocular or stereo-microscope from any appropriate angle, with the device suitably illuminated. The inspection criteria of3.1.4 and3.1.6.1 may be examined at high magni

32、fication at the manufacturers option. 3.0.6 Definitions (for inspection purposes only) 1) Active circuit area includes all kinds of functional circuit elements, operating metallization or any connected combinations thereof excluding beam leads. NOTEIn this context, “active” is the counterpart of “in

33、active” and has nothing to do with active and passive components. 2) Controlled environment shall be in accordance with the requirements of class3,5 environment for air cleanliness. The use of an inert gas environment such as nitrogen shall satisfy the requirements for storing in controlled environm

34、ent. The relative humidity shall not exceed50%. 3) Diffusion tub is an isolated volume of semiconductor material, of either “P” or “N” type, surrounded by isolation material. 4) Foreign material is any material not used in the manufacture of the microcircuit or any material that is displaced from it

35、s original or intended position within the micro-circuit package and shall be considered attached if it cannot be removed by a nominal gas blow of approximately140kPa. Conductive foreign material is defined as any substance that appears opaque under those conditions of lighting and magnification use

36、d in routine visual inspection. NOTEA particle shall be considered embedded in the glassivation when there is evidence of colour fringing around the periphery of the particle. 5) Functional circuit elements are active or passive components such as diodes, transistors, capacitors, resistors, crossund

37、ers, etc. 6) Gate oxide bridge is the area lying between the drain and source diffusions of MOS structures. References to the metallization covering the gate oxide bridge shall include all materials that are used for the gate electrode. 7) Glassivation is the top layer of insulating material that co

38、vers the active circuit area including metallization, except bonding pads and beam leads. Crazing is the presence of minute cracks in the glassivation. 8) Junction is the outer edge of the passivation step that delimits the boundary between “P” and “N” type semiconductor material. 9) Multilayered me

39、tallization (conductors) is two or more layers of metal or any other material used for interconnections that are not isolated from each other by a grown or deposited insulating material. The term “underlying metal” shall refer to any layer below the top layer of metal. 10) Multilevel metallization (

40、conductors) is two or more layers of metal or any other material used for interconnections that are isolated from each other by a grown or deposited insulating material. 11) Operating metallization (conductors) is any metal or any other material used for interconnection except metallized scribe line

41、s, test patterns, unconnected functional circuit elements, unused bonding pads and identification markings. 12) Organic polymer (epoxy) vapour residue is the material that is emitted from the polymer, that forms on an available surface. 13) Original width is the width dimension or distance that is i

42、ntended by design (e.g. original metal width, original diffusion width, original beam width, etc.). 14) Passivation step is a change in thickness of the passivation for metal to metal or metal to silicon interconnection, by design, excluding lines on the surface where passivation layers have been re

43、moved as a result of normal device processing. 15) Passivation is the silicon oxide, nitride or other insulating material that is grown or deposited directly on the die prior to the deposition of metal.BSQC790101:1992 BSI 08-1999 3 16) Peripheral metal is all metal that lies immediately adjacent to

44、or over the scribe grid. 17) Thick film is a film deposited, for example, by screen printing processes and fired at high temperature to fuse into its final form. 18) Thin film is a film (usually less than104m thickness) which is deposited onto a substrate by an accretion process such as vacuum evapo

45、ration, sputtering or pyrolytic decomposition. 19) Substrate is the supporting structural material into and/or upon which the passivation, metallization and circuit elements are placed. 20) Narrowest resistor width is the narrowest portion of a given resistor, prior to trimming. The narrowest resist

46、or width for a block resistor may be specified in the approved manufacturers documentation. 21) Kerf is that portion of the resistor area from which resistor material has been removed or modified by trimming. 22) Detritus is a fragment of the original or laser-modified resistor material remaining in

47、 the kerf. 23) Block resistor is a sheet resistor which, for trimming purposes, is designed to be much wider than would be dictated by power density requirements and shall be identified in the approved manufacturers precap visual implementation document. 24) Rebond is a second bonding made between t

48、wo pads, or a pad and a bonding terminal, to replace the original bonded wire, which has either been removed, leaving the welded portion of the bond attached to the pad or bonding terminal, or failed to adhere at the first bonding attempt. 25) Scratch is any tearing defect. Probe marks in the surfac

49、e of the metallization are considered as scratches. 26) Void is any region in the metallization where underlying material is visible and which is not caused by a scratch. 3.0.7 Interpretation For inspections performed in the magnification range of100 x to200 x, the criteria of “2,54m of passivation or metal” can be satisfied by a “line of separation” or a “line of metal”. Reference herein to “that exhibits” shall be considered satisfied when the visual image or visual appearance of the device under examination indicates that a spec