JEDEC JESD51-12 01-2012 Guidelines for Reporting and Using Electronic Package Thermal Information.pdf

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1、 JEDEC STANDARD Guidelines for Reporting and Using Electronic Package Thermal Information JESD51-12.01 (Minor Revision of JESD51-12, May 2005) NOVEMBER 2012 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approve

2、d through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and i

3、mprovement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to wh

4、ether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standard

5、s and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI s

6、tandard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer to www.jedec.o

7、rg under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2011 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By do

8、wnloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information, contact: JED

9、EC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 51-12.01 Page 1 Guidelines for Reporting and Using Electronic Package Thermal Information (From JEDEC Bo

10、ard Ballot, JCB-05-68, formulated under the cognizance of the JC-15.1 Subcommittee on Thermal Characterization.) 1 Scope This document provides guidelines for both reporting and using electronic package thermal information generated using JEDEC JESD51 standards. By addressing these two areas, this d

11、ocument can be used as the common basis for discussion between electronic package thermal information suppliers and users. The first goal is for the electronic package thermal information to be reported consistently by different suppliers. Suppliers may choose to summarize the results or present a s

12、ubset of the results, but the complete test information should be available on request. The complete information to be reported is documented in the various JESD51 standards, but key elements are consolidated in this guideline for easy reference by both suppliers and users. The second goal is for en

13、d users to be able to properly understand, interpret and use the data reported. The purpose of the JESD51 standards is to compare the thermal performance of various packages under standardized test conditions. While standardized thermal test information cannot apply directly to the many specific app

14、lications, the standardized results can help compare the relative thermal performance of different packages. A more meaningful comparison is possible if the test conditions are understood along with the factors affecting package thermal performance. Brief discussions of key topics are included in th

15、is guideline. 2 Normative references The following standards contain provisions that, through reference in this text, constitute provisions of this guideline. At the time of publication, the editions indicated were valid. All standards are subject to revision, and parties to agreements based on thes

16、e standards are encouraged to investigate the possibility of applying the most recent editions of the standards indicated below. 1 JESD51, Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Devices). This is the overview document for this series of specifications. 2

17、JESD51-1, Integrated Circuit Thermal Measurement Method - Electrical Test Method 3 JESD51-2, Integrated Circuit Thermal Test Method Environmental Conditions - Natural Convection (Still Air) 4 JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages 5 JESD51-4, Therma

18、l Test Chip Guideline (Wire Bond Type Chip) 6 JESD51-5, Extension of Thermal Test Board Standards for Packages with Direct Thermal Attachment Mechanisms JEDEC Standard No. 51-12.01 Page 2 2 Normative references (contd) 7 JESD51-6, Integrated Circuit Thermal Test Method Environmental Conditions Force

19、d Convection (Moving Air) 8 JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages 9 JESD51-8, Integrated Circuit Thermal Test Method Environmental Conditions Junction-to-Board 10 JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements 11 J

20、ESD51-10, Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements 12 JESD51-11, Test Boards for Through-Hole Area Array Leaded Package Thermal Measurements 13 JESD15-3, Two-Resistor Compact Thermal Model Standard 14 JESD15-4, DELPHI Compact Thermal Model Guideline 3 Terms, Definit

21、ions, symbols, and abbreviations Standard JESD51 1 is an overview document that introduces the electronic package thermal resistance concept. Most definitions and symbols are included in JESD51-1 2, Annex A. JESD51-2 3, Annex A includes definitions for the junction-to-top and top-to-air thermal char

22、acterization parameters. The junction-to-board thermal characterization parameter is introduced in JESD51-6 7 and the junction-to-board thermal resistance test method is in JESD51-8 9. 4 Reporting electronic package thermal results The JEDEC JESD51 family of standards defines the methodology necessa

23、ry for making meaningful thermal measurements on packages containing single chip semiconductor devices. Different aspects of the methodology are defined in separate detailed standards. To measure one component thermal value the supplier follows one standard from each of the categories in Table 1. Th

24、e JEDEC Theta-JCx standard is under development. While Theta-JC measurements have been common for years (for example, Mil Std 883C Method 1012.1), it is very difficult to define a measurement method which provides accurate and repeatable results covering a wide range of package designs, sizes, and p

25、ower dissipation. The nomenclature used in this document is consistent with the standard being developed. For the 2R model discussed in 5.2.4, the method by which Theta-JCtop was determined must be reported. JEDEC Standard No. 51-12.01 Page 3 4 Reporting electronic package thermal results (contd) Ta

26、ble 1 JESD51 Thermal measurement standards by category ENVIRONMENT1CHIP BOARD4MEASUREMENTMETHOD Natural Convection (Still Air), one cubic foot enclosure, JA, JT3 2 Forced Convection (Moving Air), wind tunnel, JMA, JT, JB7 Junction-to-Board, JB9 Junction-to-Case, JCx3 Thermal Test Chip Wire Bond Type

27、 5 Thermal Test Chip Flip Chip Type (not yet available; refer to 5 for applicable information) Active Die or Thermal Test Die 2 Low Effective Thermal Conductivity (1s board), Leaded Surface Mount Packages 4,65 High Effective Thermal Conductivity (2s2p board), Leaded Surface Mount Packages 8,64 Area

28、Array Surface Mount Packages (1s and 2s2p boards) 10 Through-Hole Perimeter Leaded Packages (1s and 2s2p boards) 11 Through-Hole Area Array Leaded Packages (1s and 2s2p boards) 12 Static Mode or Dynamic Mode; Active Die or Thermal Test Die 2 NOTE 1 In some cases the environment standards identify wh

29、ich test board cross-section (see note 3) is to be used when measuring a particular thermal value. JA the board used must be indicated 3 JMA 1s board, unless indicated otherwise 7 JB 2s2p board 9; JBis also normally measured on the 2s2p board 7 A 1s board may not be practical for high lead count com

30、ponents. More discussion of the boards is included in 5.3.2. NOTE 2 JBwas not included in the natural convection standard 3; it had not yet been defined. It may be added in the future. JBcan be measured in the natural convection environment, but it is normally measured on a 2s2p board, and in the fo

31、rced convection environment, including the zero forced convection condition 7. NOTE 3 The JEDEC JCxstandard is under development. While JCmeasurements have been common for years (for example, Mil Std 883C Method 1012.1), it is very difficult to define a measurement method which provides accurate and

32、 repeatable results covering a wide range of package designs, sizes, and power dissipation. The nomenclature used in this document (see 5.2.2) is consistent with the standard being developed. For the 2R model discussed in 5.2.4, the method by which JCtopwas determined must be reported NOTE 4 Two tes

33、t board cross-sections are defined in the JESD51 standards. The first cross-section is referred to as the low effective thermal conductivity or 1s board. The 1s refers to the one signal layer on the component side of the board, so the board is sometimes referred to as a single layer board. Limited s

34、ignals are permitted on the opposite side actually making it a 2s or two layer board. The key point is that this board does not have power planes (0p). The signal layer traces are 0.070 mm (2 oz/ft2) finished copper thickness. The second cross-section is referred to as the high effective thermal con

35、ductivity or 2s2p board. It has significantly more copper. The 2s refers to the signal layers on both outside surfaces of the board and the 2p refers to two power planes in the board (voltage and ground). The board is sometimes referred to as a four layer board. The signal layer traces are 0.070 mm

36、(2 oz/ft2) finished copper thickness and the power planes are 0.035 mm (1 oz/ft2) finished copper thickness. For packages with ball pitch 0.5 mm the traces are reduced to 0.050 mm (1.5 oz/ft2) finished copper thickness for both boards. 10 Test boards designed according to JEDEC JESD51 standards are

37、referred to as JEDEC JESD51 boards or JESD51 boards. JEDEC does not make thermal test boards available. NOTE 5 Reference 6 extends board standards 4 and 8 for packages with direct thermal attach mechanisms such as deep down-set exposed pad packages or thermally tabbed packages. JEDEC Standard No. 51

38、-12.01 Page 4 4 Reporting electronic package thermal results (contd) Following a selected set of these standards allows the supplier to report the thermal information included in the Environment column. Each of the standards also has a table at the end that tells the component supplier what test con

39、dition information is to be reported for that aspect of the test. The following statement is from the JESD51 Overview, Clause 5: “Thermal data are not meaningful unless all pertinent test condition information is provided with the actual thermal data . (The) documents for each of the measurement are

40、as.state the thermal information necessary for a complete description of the data.“ Table 2 thru Table 11 of this document identify some of the key elements from the standards that affect the thermal results. Suppliers may choose to summarize the results or present a subset of the results, but the c

41、omplete test information should be available on request. Suppliers may deviate from the JEDEC standards and still provide valuable data. Such deviations are to be identified. When reporting information from tests run according to the JESD51 standards, suppliers are encouraged to indicate this in the

42、ir reports and datasheets, together with any deviations. An example is given here. “This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Deviations from the JESD51 standards are noted on page xx.” 5 Using standardized thermal results 5

43、.1 General problems using standardized thermal results Several factors affect the thermal performance of a device in a users application. These include power dissipation in the component; airflow velocity, direction and turbulence level; power in adjacent components; two-sided vs. one-sided active c

44、omponent mounting; printed circuit board (PCB) orientation; and adjacent boards and their power dissipation. Ways in which the JESD51 test condition may not match a specific application include Die size Printed circuit board size Amount of copper on the application boards vs. the JESD51 2s2p board C

45、opper trace thickness JESD51 0.070 mm (2 oz/ft2) copper vs. application 0.018 mm (1/2 oz/ft2) copper, for example Trace widths JESD51 widths may be larger than trace widths in the application, for example Environment JESD51 natural convection one cubic foot enclosure vs. a cell phone, for example Si

46、ngle heat source vs. multiple heat sources in the application JEDEC Standard No. 51-12.01 Page 5 5 Using standardized thermal results (contd) 5.1 General problems using standardized thermal results (contd) For specific applications, component and system level thermal engineers should be consulted. I

47、t may be necessary to test or model specific applications. This may require special thermal test vehicles involving application-specific boards and thermal test die. Numerical modeling of the thermal performance of a component in a JESD51 standardized test can be used as a basis for modeling of the

48、component in a specific application. To accomplish this, detailed package geometry and material information is required from the component supplier. Alternatively, the supplier may provide compact models that can be incorporated in numerical models (see 5.2.4). This testing and modeling of a compone

49、nt users specific applications is the users responsibility, but the work may be performed by component suppliers or consultants. 5.2 JESD51 standardized thermal values The thermal resistances and thermal characterization parameters that are generated using JESD51 standards are described here together with their typical uses. All have the units of C/W. Reported results are generally average values. Standard deviat