JEDEC JESD22-B112A-2009 Package Warpage Measurement of Surface-Mount Integrated Circuits at Elevated Temperature.pdf

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1、JEDEC STANDARD Package Warpage Measurement of Surface-Mount Integrated Circuits at Elevated Temperature JESD22-B112A (Revision of JESD22-B112, May 2005) OCTOBER 2009 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, an

2、d approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeabil

3、ity and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without reg

4、ard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC

5、 standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become

6、an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or call (703)

7、907-7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2009 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees no

8、t to charge for or resell the resulting material. PRICE: Please refer to the current Catalog of JEDEC Engineering Standards and Publications online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC

9、 and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or

10、call (703) 907-7559 JEDEC Standard No. 22-B112A Page 1 Test Method B112A (Revision of Test Method B112 Package Warpage Measurement of Surface-Mount Integrated Circuits at Elevated Temperature (From JEDEC Board Ballot JCB-09-61, formulated under the cognizance of the JC-14.1 Subcommittee on Reliabili

11、ty Test Methods for Packaged Devices.) 1 Scope The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of thermal conditions experienced during the surface-mount soldering operation. 2 Background When integrated circuit pa

12、ckages are subjected to the high-temperature solder reflow operation associated with circuit board assembly, deformation and deviation from an ideal state of uniform planar flatness, i.e., warpage, often results. The package warpage during board assembly can cause the package terminals to have open

13、or short circuit connections after the reflow soldering operation. Certain package types, such as ball grid arrays (BGAs), have been found to be more susceptible to component warpage. Intrinsic package warpage is largely driven by coefficient of thermal expansion mismatch between the various packagi

14、ng material constituents, but can also be affected by absorbed moisture. Package warpage is temperature dependent, and the final warpage state is a function of the entire temperature history or reflow profile. JESD22-B108A measures device terminal coplanarity only at room temperature and cannot be u

15、sed to predict warpage at elevated temperatures. The worst-case warpage may be at room temperature, maximum reflow temperature, or any temperature in-between; consequently, package warpage must be characterized during the entire reflow soldering thermal cycle. Critical engineering evaluations of the

16、 package and printed circuit board warpage should be conducted in the laboratory under simulated reflow conditions. For many packages, warpage can change with continued reflow cycles so this measurement should be made and reported for the first reflow cycle. 3 Terms and definitions concave warpage:

17、Negative (-) warpage resulting in the package corners being farther from the contact plane than the center of the bottom surface of the package substrate. contact plane: A plane parallel to the reference plane passing through the lowest contact point on the package substrate. convex warpage: Positiv

18、e (+) warpage resulting in the package corners being closer to the contact plane than the center of the bottom surface of the package substrate. JEDEC Standard No. 22-B112A Page 2 Test Method B112A (Revision of Test Method B112 3 Terms and definitions (contd) deviation from planarity: The difference

19、 in height between the highest point and the lowest point on the package substrate bottom surface measured with respect to the reference plane. digital image correlation: A 3D imaging technique utilizing multiple triangulated cameras and computerized image matching. fringe projection: The projection

20、 of structured light on the sample utilizing image processing to determine package surface displacement. laser reflectometry: Use of a confocal microscope to determine focal plane and thereby measure the displacement of a surface. package warpage: The maximum distance between the contact plane and t

21、he bottom package surface within the measurement area. peak reflow temperature: The maximum package reflow temperature as specified in J-STD-020 depending on package dimensions and whether the product is intended for eutectic Sn-Pb or Pb-free reflow soldering temperature. rated moisture sensitivity

22、level (MSL): The moisture sensitivity level as determined by J-STD-020. reference plane; regression plane: A least-squares fit of all the bottom-side or top-side measurement points on a package. shadow moir: Referring to an optical noncontact method to measure warpage using a moir fringe pattern res

23、ulting from the geometric interference between a flat reference grating and the projected shadow of the grating on a warped test object. Concave (-) Warpage Convex (+) Warpage Figure 1 Package warpage convention Reference PlaneContact PlaneJEDEC Standard No. 22-B112A Page 3 Test Method B112A (Revisi

24、on of Test Method B112 4 Reference documents (informative) JEITA ED-7306, Measurement methods of package warpage at elevated temperature and the maximum permissible warpage JEP-113, Symbols and Labels for Moisture Sensitive Devices J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermeti

25、c Solid State Surface Mount Devices. JESD22-A113, Preconditioning of Nonhermetic Solid State Surface Mount Components Prior to Reliability Testing. JESD22-B100, Physical Dimensions. JESD22-B108, Coplanarity Test for Surface-Mount Semiconductor Devices. 5 Measurement instrument requirements 5.1 Gener

26、al Metrology Considerations Warpage metrologies such as Shadow Moir, 3D Digital Image Correlation, Fringe projection (structured light phase modulation), and various forms of line scanning and/or high-resolution focusing based tools have been successfully applied and validated under ambient test con

27、ditions. A few of these tools have been successfully adapted and commercialized to support in-situ package warpage measurements at elevated temperatures. This specification focuses on general measurement issues and presents some tool specific considerations. Temperature uniformity across the sample,

28、 rate of the temperature ramp, and moisture absorbed in the measurement sample are all important variables. The tool used for elevated temperature warpage metrology should be verified using a concave or convex warpage standard that is invariant to temperature changes across the temperature range of

29、interest, as outlined in clause 6. Measurement accuracy should be verified at temperature extremes such as through the use of a concave or convex ground glass manufactured from ultra-low-expansion material such as Zerodur optical ceramic with a coefficient of linear expansion between 20C and 300C of

30、 0.05 0.10 x 10-6/C. Periodic repeatability measurements should be conducted at elevated temperature using the high temperature warpage standard. Reproducibility of test data should be initially evaluated with respect to any operator-to-operator, day-to-day, or other extrinsic factors which may pote

31、ntially influence tool performance. Once successfully validated, the tool should be routinely calibrated and monitored on a periodic basis. Sample preparation, temperature profiling, and sample temperature distribution guidelines should be followed according to clause 7 of this document. JEDEC Stand

32、ard No. 22-B112A Page 4 Test Method B112A (Revision of Test Method B112 5 Measurement instrument requirements (contd) 5.2 Thermal Shadow Moir Apparatus (Figure 2) 5.2.1 Camera to capture shadow moir pattern 5.2.2 Ronchi ruled grating made from low CTE glass, specifically defined lined pitch grating

33、through which light passes to cast a shadow moir pattern onto the sample. Typically 40 to 200 lines/cm. 5.2.3 Light source to project white light through the grating and to cast a shadow of the reference grating (i.e. Ronchi grating) on the sample. The observer sees the shadow on sample and the supe

34、rimposed reference grating. Moir pattern is formed by interaction between the shadow grating and the reference grating. 5.2.4 Electromechanical Z stepping sample stage for phase shifting and acquiring fringe pattern at different heights. 5.2.5 Computer controlled display system for fringe pattern di

35、splay, storage, retrieval, printing and analysis. 5.2.6 Sample Holder used to hold and align the sample and to prevent it from moving during measurement. 5.2.7 NIST traceable calibration block using step height changes may be required for some instruments. 5.2.8 A curved glass standard made of ultra

36、 low expansion glass of known bend radius is also recommended for tool validation at elevated temperature. 5.2.9 Thermal chamber used to heat the samples for in situ warpage measurements, convection heating is preferred due to it similarity to actual solder reflow ovens. IR heating will produce temp

37、erature gradients across the device under test and may require the heating and cooling rates to be reduced in order to obtain accurate results. 5.2.10 Thermocouples attached to the sample or attached to a second identical reference sample used for measuring elevated temperature response. Temperature

38、 gradients across the sample may product erroneous results. Temperature uniformity should be verified on the reference sample or a test run. JEDEC Standard No. 22-B112A Page 5 Test Method B112A (Revision of Test Method B112 5 Measurement instrument requirements (contd) 5.2 Thermal Shadow Moir Appara

39、tus (Figure 2) (contd) Figure 2 Shadow Moir Apparatus Thermal Shadow moir measurements are conducted by placing the Ronchi ruled grating and the sample of interest into a thermally insulated enclosure, see Figure 2. A heat source is then used to ramp the temperature of the sample under test. A shado

40、w of the reference grating is cast onto the surface of the specimen below by projecting a beam of white light at a specified angle through the grating. Moir fringe patterns are produced as a result of the geometric interference pattern created between the reference grating and the shadow grating. Th

41、e Ronchi grating line spacing and overall planarity of the glass substrate are generally invariant to changes in temperature. 5.2.11 An accurately calibrated fringe constant is required to convert a whole field shadow moir fringe pattern into a 3D surface map of package warpage. The shadow moir frin

42、ge count is related to out-of-plane deformation (warpage) using the fringe constant calibration formula (1). tantan +=NpW (1) where: N = Fringe order p = grating pitch = angle of illumination = angle of observation W = out of plane (normal) displacement or warpage Light Source ThermocoupleThermal Gr

43、easeKapton Tape Thermal Enclosure Ronchi Grating Camera Heating Element as shown usually 0 JEDEC Standard No. 22-B112A Page 6 Test Method B112A (Revision of Test Method B112 5 Measurement instrument requirements (contd) 5.2 Thermal Shadow Moir Apparatus (Figure 2) (contd) In typical shadow moir syst

44、ems the imaging plane is directly over the object such that the observation angle =0 and the light source illumination angle 45. Phase shifting is routinely implemented as a means of converting whole field fringe patterns into continuous 3D plots of surface topography, see Figure 3. A precise comput

45、er controlled stepper motor is utilized to displace the sample stage with respect to the glass grating and in doing so generates a series of discrete phase shifted fringe patterns. Typically four such patterns are acquired although numerous schemes exist that utilize 3 or more phase shifted patterns

46、. Figure 3 Package substrate phase-shifted fringe pattern sequence and resulting 3D Surface Profile. The Ronchi rule grating line frequency is typically in the range of 40 to 200 lines/cm and the physical gap required between the grating and sample is typically on the order of several millimeters. T

47、he physical gap between the grating and the sample is adjusted to optimize fringe contrast of the generated fringe pattern. Following equation (1), finer pitch gratings yield increased measurement sensitivity but require a smaller gap between the grating and sample in order to achieve good contrast.

48、 With a given grating frequency (pitch), the closer sample is placed to the reference grating, the better the fringe visibility; however, caution should be used that the samples do not touch the reference grating during testing. In general, the finest possible grating pitch should be used in order t

49、o maximize the fundamental sensitivity of the instrument. The fringe pattern should generate a minimum of 2 circular or irregular concentric fringes when the sample is symmetrically oriented and nominally running parallel with respect to the plane of the Ronchi grating. If geometric considerations or the height of other assembled electronic components restrict the proximity of the grating to the package surface, a coarser grating must then be considered that will necessarily permit a greater grating to sample gap. Fringe analysis is app