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JEDEC EIA-397-1972 Recommended Standards for Thyristors《晶闸管推荐标准》.pdf

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c - - - - - EIA 397 72 3234600 0067190 3 W JUNE, 19 1/16“ from the seated surface (or case) for seconds 4. Maximum operating junction temperature B. Voltage at T2 to T5 See Note 2. M Specify either Item I or 2 below. 1. Alternating principal voltage, 50-400 Hz Gate bias conditions: Source voltage = -,V and Source resistance = Cl or Gate bias resistance = - i2 a. Repetitive peak off-state voltage, half sine wave (VDM) half sine wave (VRW) half sine wave (VRsM) b. Repetitive peak reverse voltage, c. Non-repetitive peak reverse voltage, 0067239 3 OC to (T3) OC (T2 1 “C OC OC V V

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