DLA SMD-5962-99585 REV A-2007 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 36 000 GATES MONOLITHIC SILICON《微型电路 带记忆力 数字型 CMOS 现场可编程门阵列 36000门 单块硅》.pdf
《DLA SMD-5962-99585 REV A-2007 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 36 000 GATES MONOLITHIC SILICON《微型电路 带记忆力 数字型 CMOS 现场可编程门阵列 36000门 单块硅》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-99585 REV A-2007 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 36 000 GATES MONOLITHIC SILICON《微型电路 带记忆力 数字型 CMOS 现场可编程门阵列 36000门 单块硅》.pdf(25页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update, part of 5 year review. ksr 07-07-23 Robert M. Heber REV SHET REV A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREP
2、ARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 9
3、9 - 07 - 13 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY, 36,000 GATES, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-99585 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E503-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without l
4、icense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99585 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q a
5、nd M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the follo
6、wing example: 5962 - 99585 01 Q X C | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marke
7、d devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device
8、type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Bin speed 01 A42MX36 36,000 gate field programmable gate array 148.5 ns 1/ with 2,560 SRAM bits 02 A42MX36-1 36,000 gate field programmable gate array 122.0 ns 1/ with 2,560 SRAM bits 1.
9、2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance
10、with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See Figure 1 256 Ceramic Quad Flat Pack Y See Figure 1 2
11、08 Ceramic Quad Flat Pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Bin speed is tested at 125C at 5 volts for worst case condition. Provided by IHSNot for ResaleNo reproduction or networking per
12、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99585 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ DC supply voltage range (VCC) -0.5 V dc to +7.0 V dc Input voltage range (VI) .
13、-0.5 V dc to VCC+0.5 V dc Output voltage range (VO) .-0.5 V dc to VCC+0.5 V dc I/O source sink current (IIO) .20 mA Storage temperature range (TSTG).-65C to +150C Lead temperature (soldering, 10 seconds) 300C Thermal resistance, junction-to-case (JC) : Case X.8C/W 3/ Case Y.9C/W 3/ Maximum junction
14、temperature (TJ).+150C 1.4 Recommended operating conditions. 3.3V Power supply for 3.3 V operation +3.0 V dc to +3.6 V dc (10% Vcc) 5.0V Power supply for 5.0 V operation +4.5 V dc to +5.5 V dc (10% Vcc) Case operating temperature range (TC) -55C to +125C 1.5 Digital logic testing for device classes
15、Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, method 5012) 100 percent 4/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein.
16、 Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircu
17、its. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ o
18、r http:/assist.daps.dla.mil from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of th
19、ese documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addr
20、essed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/
21、 When a thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein. 4/ 100 percent test coverage of blank programmable logic devices. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI
22、CROCIRCUIT DRAWING SIZE A 5962-99585 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industri
23、es Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informatio
24、nal services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
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