DLA SMD-5962-96552 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR MULTIPLEXER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R092-97. 96-11-18 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-09-14 Thomas M. Hess C Correct the title to accurately describe the device function. Updat

2、e boilerplate to the latest MIL-PRF-38535 requirements. - jak 07-09-13 Thomas M. Hess D Update boilerplate paragraphs and radiation paragraphs 4.4.4.1 4.4.4.4 to the current MIL-PRF-38535 requirements. Delete class M requirement throughout.- LTG 13-12-17 Thomas M. Hess REV SHEET REV SHEET REV STATUS

3、 REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF

4、THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-07-02 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-

5、96552 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E082-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. S

6、COPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a cho

7、ice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96552 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1

8、.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit fu

9、nction as follows: Device type Generic number Circuit function 01 54ACS157 Radiation hardened, quadruple 2-line to 1-line data selector/multiplexer 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device re

10、quirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Dual fla

11、t pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV

12、ISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-

13、up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum package power dissipation (PD) . 1.0 W 1.4 Recommended operating condit

14、ions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 4/ 1.5 Radiation features. 5/ Maxim

15、um total dose available (dose rate = 50 300 rads (Si)/s) 1 x 106Rads (Si) Single event phenomenon (SEP): Effective linear energy transfer (LET), no upsets (see 4.4.4.4) 80 MeV/(mg/cm2) 6/ Effective linear energy transfer (LET), no latch-up (see 4.4.4.4) 120 MeV/(mg/cm2) 6/ Dose rate upset (20 ns pul

16、se) 1 x 109Rads (Si)/s Latch-up . None Dose rate survivability . 1 x 1012Rads (Si)/s _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all volta

17、ges are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise noted. 4/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 5/ Radiatio

18、n testing is performed on the standard evaluation circuit. 6/ Limits obtained during technology characterization/qualification, guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduc

19、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following speci

20、fication, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Sp

21、ecification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawing

22、s. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specif

23、ied herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document i

24、s available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P. O. Box C700, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precede

25、nce. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as mo

26、dified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-3853

27、5 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram.

28、 The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revisi

29、on level control and shall be made available to the preparing and acquiring activity upon request. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

30、N LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case

31、operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the man

32、ufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for devi

33、ce classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be r

34、equired from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product me

35、ets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for Resal

36、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C T

37、C +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max High level input voltage VIHAll 4.5 V 1, 2, 3 3.15 V M, D, P, L, R, F, G, H 3/ All 1 3.15 All 5.5 V 1, 2, 3 3.85 M, D, P, L, R, F, G, H 3/ All 1 3.85 Low level input voltage VILAll 4.5 V 1, 2, 3 1.35 V M, D, P

38、, L, R, F, G, H 3/ All 1 1.35 All 5.5 V 1, 2, 3 1.65 M, D, P, L, R, F, G, H 3/ All 1 1.65 High level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSIOH= -100.0 A All 4.5 V 1, 2, 3 4.25 V M, D, P, L, R, F, G, H 3/ All 1 4.25 Low level output voltage VOLFor all inputs affe

39、cting output under test, VIN= VDDor VSSIOL= 100.0 A All 4.5 V 1, 2, 3 0.25 V M, D, P, L, R, F, G, H 3/ All 1 0.25 Input current high IIHFor input under test, VIN= 5.5 V For all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A M, D, P, L, R, F, G, H 3/ All 1 +1.0 Input current low IILFor input und

40、er test, VIN= VSSFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A M, D, P, L, R, F, G, H 3/ All 1 -1.0 Output current (Sink) IOL 4/ VIN= VDDor VSS, VOL= 0.4 V All 4.5 V and 5.5 V 1, 2, 3 8.0 mA Output current (Source) IOH 4/ VIN= VDDor VSS, VOH= VDD-0.4 V All 4.5 V and 5.5 V 1, 2, 3 -8.0

41、mA Quiescent supply current IDDQVIN= VDDor VSSAll 5.5 V 1, 2, 3 10.0 A M, D, P, L, R, F, G, H 3/ All 1 10.0 Short circuit output current IOS5/ 6/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 -200 200 mA Input capacitance CINf = 1 MHz, see 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf = 1 MHz, see 4.4.1c

42、All 0.0 V 4 15.0 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE IA

43、. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max Switching power dissipation PSW7/ CL= 50 pF, per switching output All 4.5 V and 5.5 V 4, 5, 6 1.9 mW/MHz Functional test

44、 8/ VIH= 0.7 VDD, VIL= 0.3 VDDSee 4.4.1b All 4.5 V and 5.5 V 7, 8 L H M, D, P, L, R, F, G, H 3/ All 7 L H Propagation delay time, mA or mB to mY tPLH19/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 2.0 13.0 ns M, D, P, L, R, F, G, H 3/ All 9 2.0 13.0 tPHL19/ CL= 50 pF, see figure 4 All 4.5

45、V and 5.5 V 9, 10, 11 2.0 15.0 M, D, P, L, R, F, G, H 3/ All 9 2.0 15.0 Propagation delay time, G to mY tPLH29/ CL= 50 pF, see figure 4 All 4.5 V and 4.5 V 9, 10, 11 2.0 12.0 ns M, D, P, L, R, F, G, H 3/ All 9 2.0 12.0 tPHL29/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 2.0 15.0 M, D, P, L

46、, R, F, G, H 3/ All 9 2.0 15.0 Propagation delay time, A/B to mY tPLH39/ CL= 50 pF, see figure 4 All 4.5 V and 4.5 V 9, 10, 11 2.0 14.0 ns M, D, P, L, R, F, G, H 3/ All 9 2.0 14.0 tPHL39/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 2.0 16.0 M, D, P, L, R, F, G, H 3/ All 9 2.0 16.0 1/ Each

47、input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA herein. Output terminals not designated shall be high level logic, low level logic, or open, except for the IDDQtest, the output terminals shall be open. When performing the

48、IDDQtest, the current meter shall be placed in the circuit such that all current flows through the meter. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to VSSand the direction of current flow respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ RHA parts supplied to this drawing have been characterized through all levels M, D, P, L, R, F, G, and H of irradiation. However, these devices are only tested at the “H