DLA SMD-5962-93112-1994 MICROCIRCUIT DIGITAL CMOS PROGRAMMABLE SKEW CLOCK BUFFER MONOLITHIC SILICON《硅单片 可编程低失真时钟缓冲器 氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-93112-1994 MICROCIRCUIT DIGITAL CMOS PROGRAMMABLE SKEW CLOCK BUFFER MONOLITHIC SILICON《硅单片 可编程低失真时钟缓冲器 氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-93112-1994 MICROCIRCUIT DIGITAL CMOS PROGRAMMABLE SKEW CLOCK BUFFER MONOLITHIC SILICON《硅单片 可编程低失真时钟缓冲器 氧化物半导体数字微型电路》.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、LTR I APPROVED DESCRIPTION DATE (YR-MO-DA) I CHECKED BY Monica L. Poelking APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 94-09-1 3 REVISION LEVEL REV I MICROCIRCUIT, DIGITAL, CMOS, PROGRAMMABLE SKEW CLOCK BUFFER, MONOLITHIC SILICON . SIZE CAGE CODE 5962-93112 A 67268 SHEET 1 OF 19 REV III SHE

2、ET REV STATUS OF SHEETS PMIC NIA STANDARD MICROCIRCUIT DRAHIMG THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A ESC FORM 193 JUL 91 5962-E270-93 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Provided by IHSNot

3、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1.1 Scope. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two Droduct assuranc

4、e classes consisting of military high reliability (device classes Q and MI and space application (device class VI, and a choice of case outlines and lead finishes are avaiiable and are reflected in the Part or Identifying Number (PIN). 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in

5、conjunction with compliant non-JAN devices“. availabLe, a choice of Radiation Hardness Assurance (RHA) levels are re41ected in the PIN. Device class H microcircuits represent non-JAN class B microcircuits in accordance with When 1.2 PJN. The PIN shall be as shown in the following example: SIZE 5962-

6、93112 A REVISION LEVEL SHEET 5962 - 93112 o1 - I I I I I I Federal stock class designator type designator (See 1.2.1) (See 1.2.2) Devi ce RHA I / N - I I Devi ce class designator (See 1.2.3) X - i Ease outline (See 1.2.4) X - I I 1 Lead finish (see 1.2.5) Drawing number 1.2.1 RHA desianator. Device

7、class il RHA marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. non-RHA device. Device classes (I and V RHA marked devices shall m

8、eet the A dash (-1 indicates a 1.2.2 Device type(s). The device typeCs) shall identify the circuit function as follows: Skew error Device type Generic number Circuit function o1 76992 Programmable skew clock buffer 0.7 ns 1.2.3 Device class designator. The device class designator shall be a single l

9、etter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535 1.2.4 Case outline(

10、s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter X 1.2.5 Lead finish. The lead MIL-1-38535 for classes Q and V. designation is for use in specif without preference. Descriptive designator Termi nah Packaqe style CQCCI-N32 32 Leadless chip carrier inish sh

11、all be as specified in NIL-STD-883 (see 3.1 herein) for class M or cations when lead finishes A, 8, and C are considered acceptable and interchangeable Finish letter “X“ shall not be marked on the microcircuit or its packaging. The “X“ )ESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproducti

12、on or networking permitted without license from IHS-,-,-1.3 Absolute maximum ratings. I/ z/ 3/ Supply voltage range (V CN, VCCQ) - - - - - - - - - - - - - OC input voltage range FvIN) - - - - - - - - - - - - - - - Output current into outputs (low) (IoL) - - - - - - - - - - Storage temperature range

13、(TcTG) - - - - - - - - - - - - - Maximum power dissipation (Po) - - - - - - - - - - - - - - Lead temperature (soldering, IO seconds) - - - - - - - - - Thermal resistance, junction-to-case (OJc) - - - - - - - - Junction temperature (TJ) - - - - - - - - - - - - - - - - - 1.1 Recommended operating cond

14、itions. g/ ?/ Supply voltage range (Vc N, VCc$ - - - - - - - - - - - - input voltage range (VI$ - - - - - - - - - - - - - - - - - Output voltage range (V,) - - - - - - - - - - - - - - - - High level input voltage range (VI“, VI“): VI“- VI“ VIL- VILL _-_-_- Mid level input voltage range (VIMM) Low le

15、vel input voltage range (VIL, VILLI: - - - - - - - - - - - Case operating temperature (TC) - - - - - - - - - - - - - - Input rise or fall time (tr, tf): Maximum high levef output current (Io 1 - - - - - - - - - - Maximum low level output current (IoLy - - - - - - - - - - (0.2VCC.to 0.8V c: 0.8Vcc to

16、 0.2Vcc) - - - - - - - - - - 1.5 Diqital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STO-883, test method 5012) - - - - - - -0.5 V dc to +7.0 V dc -0.5 V dc to t7.0 V dC 64 mA -65C to +150“C 911 mW +26O0c See MIL-STD-1835 475C +4.5 V dc to t

17、5.5 V dc 0.0 V dc to VCCQ 0.0 V dc to VCCN Vcca - 1.35 V dc to VCC- VCCQ - 1.W V dc to VCCQ $1 ?/ $1 vCcQ/2 t5O mV dc r/ -0.0 V dc to 1.35 V dc o/ 0.0 V dc to 1.0 V dc s/ $/ -55OC to +12SoC O to 3 ns +46 mA -40 mA XX percent I/ - I/ Stresses above the absolute maximum rating may cause permanent dama

18、ge to the device. maximum Levels may degrade performance and affect reliabi lity. Unless otherwise specified, all voltages are referenced to ground. Unless otherwise specified the values listed above shall apply over the full VCCN, VCCQ and TC recommended operating range. ranges and case temperature

19、 range of -55C to +12SC. This voltage range applies to the REF and FB inputs only. This voltage range applies to the TEST, FS, and mFn inputs only. or left unconnected, (actual threshold voltages vary as a percentage of Vcc ), internal termination resistors hold unconnected inputs at VCCQ/2. If thes

20、e inputs are suitched the function an8 timing of the outputs may glitch and the phase-lock-loop (PLt) may require an additional TLOCK time before all table I limits are acheived. Negative undershoots of -2.0 V dc are allowed with a pulse width HM (N/A) LL/Ht (NIA) HH - STANDARDIZED MILITARY DRAWING

21、DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 Test Mode SIZE 5962-93112 A REVZSION LEVEL SHEET 18 FB input REF Input -6tu -4t, -3t, -2tu -It” Ut” +It, +2tu +xu +4tu +6t u DIVIDED INVERT lhe test input is a three-level input. In noraraL operation, the F6 pin is connected to ground, allowing de

22、vice type 01 to operate as explained brief ly above (for testing purposes, any of the three-leiel inputs can have a removable jumper to ground, or be tied low through a 1oOn resistor. change the state of these pins). loop disconnected, and input levels supplied to REF will directly control all outpu

23、ts. output tunctlons are the same a$ in norms1 niode. their own function select inputs (xF0 and xF1) and the waveform characteristics of the REF input. This will allow an external tester to if the test input is forced to its mid or high state, the device will operate with its internal phase locked R

24、elative output to In contrast with normal operation (test tied Lou), all outputs will function based only on the connection of I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I STANDARDIZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER

25、DAYTON, OHIO 45444 REVISION LEVEL SMD-5962-93112 5962-93112 SHEET 19 5.6 One part - one part number system. allow for transitions betueen identical generic devices covered by the three major microcircuit requirements documents (MIL-H-38534, MIL-1-38535, and 1.2.1 of MIL-STD-883) without the necessit

26、y for the generation of unique PINS. The three military requirements documents represent different class levels, and previously when a device manufacturer Jpgraded military product from one class level to another, the benefits of the upgraded product were unavailable to the Original Equipment Manufa

27、cturer (OEM), that was contractually locked into the original unique PIN. Establishing a one part number system covering all three documents, the OEM can acquire to the highest class level available for a given generic device to meet system needs without modifying the original contract parts selecti

28、on criteria. The one part - one part number system described below has been developed to By Military documentetion format leu MIL-H-38534 Standard Microcircuit Drawings New NIL-1-38535 Standard Microcircuit Drawings New 1.2.1 of MIL-STD-883 Standard Microcircuit Drawings 6.7 Sources of supply. Examp

29、le PIN Manufacturing Document under new system 1 i st inq source listing MIL-BUL-I O3 5962-XXXXXZZ(H or K)W QML-38534 5962-XXXXXZZ(Q or V)YY QML-38535 IL-BUL-103 MIL-BUL-103 MIL-BUL-103 5962-XXXXXZZ(M)YY 6.7.1 Sources of supply for device c Isses Q and V. Sources of supply for device classes Q and V

30、 are listed in QML-38535. have agreed to this drawing. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DESC-EC and 6.7.2 Approved sources of supply for device class H. Approved sources of supply for class il are listed in MIL-BUL-103. herein) has been s

31、ubmitted to and accepted by DESC-EC. lhe vendors listed in MIL-BUL-103 have agreed to this drawing and a certificate of compliance (see 3.6 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN DATE: 9

32、4-09-13 t Approved sources of supply for SM 5962-93112 are listed below for immediate acquisition only and shall be added to MIL-BUL-i03 during the next revision. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DESC-EL. MIL-B

33、UL-103 will be revised to include the addition or deletion of sources. This bulletin ir superseded by the next dated revision of MIL-BUL-103. Standard Vendor Vendor simi lar number 5%2-9311201MXX 65786 CVB992-7LbiB - 1/ Caution. Do not use this number for item acquisition. Items acquired to this num

34、ber may not satisfy the performance requirements of this drawing. Vendor CAGE number 65786 Vendor name and address Cypress Semiconductor 3901 North First Street San Jose, CA 95134-1599 I I I The information contained herein is disseminated for convenience only and I I the Government assumes no liability whatsoever for any inaccuracies in this I 1 information bulletin. t Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-