DLA SMD-5962-90516 REV C-2013 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R269-92. WLM 92-08-05 Monica L. Poelking B Redraw the switching waveforms in figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 0

2、6-08-24 Thomas M. Hess C Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-02-21 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS

3、, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL D-TYPE EDGE-T

4、RIGGERED FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-10-23 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90516 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E250-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

5、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space

6、 application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 59

7、62 - 90516 01 M R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specifi

8、ed RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the

9、 circuit function as follows: Device type Generic number Circuit function 01 54BCT374 Octal D-type edge-triggered flip-flop with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows

10、: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline

11、(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 fo

12、r device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FO

13、RM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to +7.0 V dc Voltage applied to any output in the high state (VOUT) . -0.5 V dc to VCCVoltage applied to any output in the disabled state (VOUT) . -0.5 V dc to +5.

14、5 V dc Current into any output in the low state . 96 mA Input clamp current (IIC) . -30 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 541 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction

15、temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Maximum high level output current (IOH) -12 mA Maximum low level output current (IOL) +48

16、mA Minimum setup time, data before CLK rising (ts) . 6.5 ns Minimum hold time, data after CLK rising (th) 0 ns Minimum pulse duration, CLK high (tw) 8 ns Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The followin

17、g specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, Gen

18、eral Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit

19、Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the

20、 references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation

21、 at the maximum levels may degrade performance and affect reliability. 2/ Must be able to withstand the additional PDdue to the short circuit test, e.g., IOS. The PDlimit is based upon dc values. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

22、RD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, o

23、r as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B

24、 devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The cas

25、e outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching

26、 waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits

27、 are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be

28、marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this opti

29、on, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall b

30、e a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to sup

31、ply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime

32、-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of confor

33、mance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification t

34、o DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring

35、 activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be

36、 in microcircuit group number 127 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234

37、 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIH= 2.0 V or VIL= 0.8 V IOH= -3 mA 1, 2, 3 All 2.4 V IOH= -12 mA 2.0 Low level outp

38、ut voltage VOLVCC= 4.5 V VIH= 2.0 V or VIL= 0.8 V IOL= +48 mA 1, 2, 3 All 0.55 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High level input current IIH1 VCC = 5.5 V, VIN = 5.5 V 1, 2, 3 All 400 A IIH2VCC= 5.5 V, VIN= 2.7 V 20 Low level input current IILVCC= 5.5 V, VIN= 0.5 V

39、1, 2, 3 All -0.6 mA Short-circuit output current 1/ IOSVCC= 5.5 V, VOUT= 0.0 V 1, 2, 3 All -100 -225 mA Supply current, outputs high ICCHVCC= 5.5 V 1, 2, 3 All 5 mA Supply current, outputs low ICCL60 Supply current, outputs disabled ICCZ8 Off-state output leakage current IOZHVCC= 5.5 V VOUT = 2.7 V

40、1, 2, 3 All 50 A IOZL VOUT= 0.5 V -50 Functional tests 2/ See 4.4.1b 7, 8 All Output frequency fMAXCL= 50 pF R1 = R2 = 500 See figure 4 VCC= 5.0 V 9 All 70 MHz VCC= 4.5 V and 5.5 V 10, 11 70 Propagation delay time, CLK to nQ tPLHVCC= 5.0 V 9 All 2.0 9.1 ns VCC= 4.5 V and 5.5 V 10, 11 2.0 11.6 tPHLVC

41、C= 5.0 V 9 All 2.0 8.8 VCC= 4.5 V and 5.5 V 10, 11 2.0 10.6 Propagation delay time, output enable, OC to nQ tPZHVCC= 5.0 V 9 All 1.0 10.1 ns VCC= 4.5 V and 5.5 V 10, 11 1.0 12.7 tPZLVCC= 5.0 V 9 All 1.0 10.6 VCC= 4.5 V and 5.5 V 10, 11 1.0 13.0 Propagation delay time, output disable, OC to nQ tPHZVC

42、C= 5.0 V 9 All 1.0 6.3 ns VCC= 4.5 V and 5.5 V 10, 11 1.0 7.1 tPLZVCC= 5.0 V 9 All 1.0 6.3 VCC= 4.5 V and 5.5 V 10, 11 1.0 7.5 1/ Not more than one output should be shorted at one time and the duration of the test condition shall not exceed one second. 2/ Functional tests shall be conducted at input

43、 test conditions of 0.4 V VIL 0.8 V and 2.0 V VIH 2.4 V for VCC= 4.5 V and is repeated at VCC= 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVI

44、SION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device type All Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OC 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND CLK 5Q 5D 6D 6Q 7Q 7D 8D 8Q VCCFIGURE 1. Terminal connections. Inputs Outputs OC CLK nD nQ L H H L L

45、L L L X Qo L H X Qo L X Qo H X X Z H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance = Upward transition of clock Qo = The level of Q before the indicated steady-state input conditions were established FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction o

46、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

47、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

48、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90516 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. When measuring tPLZ and tPZL: S1 = 7.0 V. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open. 2. The tPZLand tPLZreference waveform is for the output under test with internal conditions such that the output is at VOLexcept when disabled by the output enable control. The tPZHand tPHZreference waveform is for the output under test with internal conditions such that the ou