DLA SMD-5962-89664 REV B-2007 MICROCIRCUIT MEMORY DIGITAL CMOS CASCADABLE 64 X 8 FIFO MONOLITHIC SILICON《硅单片 可级联64 X 8先进先出式 氧化物半导体数字记忆微型电路》.pdf

《DLA SMD-5962-89664 REV B-2007 MICROCIRCUIT MEMORY DIGITAL CMOS CASCADABLE 64 X 8 FIFO MONOLITHIC SILICON《硅单片 可级联64 X 8先进先出式 氧化物半导体数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89664 REV B-2007 MICROCIRCUIT MEMORY DIGITAL CMOS CASCADABLE 64 X 8 FIFO MONOLITHIC SILICON《硅单片 可级联64 X 8先进先出式 氧化物半导体数字记忆微型电路》.pdf（16页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. Invoked dimensional requirements in accordance with CDIP3-T28 and GDIP4-T28 of MIL-STD-1835 for case outline X. Editorial changes throughout. - gap 00-11-16 Raymond Monnin B Boilerplate update and

2、part of five year review. tcr 07-02-28 Robert M. Heber THE FRONT PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHET REV B SHET 15 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICR

3、OCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, MEMORY, DIGITAL, CMOS, CASCADABLE 64 X 8 FIFO, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE D

4、RAWING APPROVAL DATE 89-08-22 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89664 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E273-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFENSE SUPPLY

5、CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). T

6、he complete PIN is as shown in the following example: 5962-89664 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2)Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Shift rate 01 7C4

7、08A-15 64 X 8 FIFO 15 MHz 02 7C408A-25 64 X 8 FIFO 25 MHz 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP3-T28 or GDIP4-T28 28 Dual-in-line package Y GDFP2-F28 28 Flat package 3 CQCC1-N2

8、8 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc to +7.0 V dc DC voltage applied to outputs . -0.5 V dc to +7.0 V dc DC Input voltage . -3.0 V dc to +7.0 V dc DC output cu

9、rrent 20 mA Maximum power dissipation 1.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): Cases X, Y, and 3 See MIL-STD-1835 Junction temperature (TJ) 1/ . +150C Storage temperature range . -65C to +150C Temperature under bias -55C to +125C 1.4 Recommended

10、 operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Ground voltage (GND) . 0 V dc Input high voltage (VIH). 2.2 V dc minimum Input low voltage (VIL). 0.8 V dc maximum Case operating temperature range (TC) . -55C to +125C 1/ Maximum junction temperature may be increased to +175C

11、during burn-in and steady-state life tests. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APP

12、LICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPAR

13、TMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HD

14、BK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Phi

15、ladelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has be

16、en obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and

17、 qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the

18、Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required

19、to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.

20、2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFEN

21、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in

22、 MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as p

23、rovided by MIL-PRF-38535 for classes Q and V. Samples may be pulled anytime after seal. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range

24、. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed

25、 in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicat

26、or “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certif

27、icate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the

28、requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change

29、to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at th

30、e option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical perf

31、ormance characteristics. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified 1/ Min Max Output high voltage VOHVCC= 4.5 V, IOH= -4.0 mA 1, 2, 3 All 2.4 V VIN= VIH, VILOutput low voltage VOLVCC= 4.5 V, IOL= 8.0 mA 1, 2, 3 All 0.4 V

32、 IN= VIH, VILInput high voltage VIH2/ 1, 2, 3 All 2.2 V Input low voltage VIL2/ 1, 2, 3 All 0.8 V Input leakage current IIXVIN= 5.5 V to GND 1, 2, 3 All -10 10 A Output leakage current IOZVCC= 5.5 V, 1, 2, 3 All -10 10 A VOUT= 5.5 V and GND DC supply current ICC1VCC= 5.5 V, IOUT= 0 mA 1, 2, 3 All 12

33、5 mA IN= 0 V and 3 V, f = 0 Operating supply ICC2VCC= 5.5 V, IOUT= 0 mA 1, 2, 3 All 3/ current VIN= 0 V and 3 V Input capacitance CINVCC= 5.0 V 4 All 8 pF TA= +25C, f = 1 MHz See 4.3.1c Output capacitance COUTVCC= 5.0 V 4 All 8 pF TA= +25C, f = 1 MHz See 4.3.1c Functional tests See 4.3.1d 7, 8 All O

34、perating frequency fO9, 10, 11 01 15 MHz 4/ 02 25 SI high time tPHSISee figure 4 9, 10, 11 01 23 ns 4/ 02 11 SI low time tPLSI9, 10, 11 01 25 ns 4/ 02 24 Data setup to SI tSSI9, 10, 11 All 0 ns 5/ See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

35、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A sub

36、groups Device types Limits Unit unless otherwise specified 1/ Min Max Data hold from SI tHSISee figure 4 9, 10, 11 01 30 ns 5/ 02 20 Delay, SI high to tDLIR9, 10, 11 01 35 ns IR low 02 21 Delay, SI low to tDHIR9, 10, 11 01 40 ns IR high 02 23 SO high time tPHSO9, 10, 11 01 23 ns 4/ 02 11 SO low time

37、 tPLSO9, 10, 11 01 25 ns 4/ 02 24 Delay, SO high to tDLOR9, 10, 11 01 35 ns OR low 02 21 Delay, SO low to tDHOR9, 10, 11 01 40 ns OR high 02 23 Data Setup to OR high tSOR9, 10, 11 All 0 ns Data hold from SO low tHSO9, 10, 11 All 0 ns Fallthrough, bubbleback tBT9, 10, 11 01 10 65 ns time 02 10 60 Dat

38、a setup to IR tSIR9, 10, 11 All 5 ns 6/ Data hold from IR tHIR9, 10, 11 01 30 ns 6/ 02 20 Input ready pulse high tPIR9, 10, 11 All 6 ns 7/ Output ready pulse high tPOR9, 10, 11 All 6 ns 8/ OE low to low Z tDLZOE9, 10, 11 01 35 ns 9/ 10/ 02 30 OE high to high Z tDHZOE9, 10, 11 01 35 ns 9/ 10/ 02 30 S

39、I low to HF high tDHHF9, 10, 11 01 65 ns 02 55 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SH

40、EET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified 1/ Min Max SO low to HF low tDLHFSee figure 4 9, 10, 11 01 65 ns 02 55 SO or SI low to AFE

41、low tDLAFE9, 10, 11 01 65 ns 02 55 SO or SI low to AFE tDHAFE9, 10, 11 01 65 ns high 02 55 MR pulse width tPMR9, 10, 11 01 55 ns 02 45 MR high to SI high tDSI9, 10, 11 01 25 ns 02 10 MR low to OR low tDOR9, 10, 11 01 55 ns 02 45 MR low to IR high tDIR9, 10, 11 01 55 ns 02 45 MR low to output low tLZ

42、MR9, 10, 11 01 55 ns 11/ 02 45 MR low to AFE high tAFE9, 10, 11 01 55 ns 02 45 MR low to HF low tHF9, 10, 11 01 55 ns 02 45 1/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the output load on figure 3, c

43、ircuit A. 2/ These are absolute values with respect to device ground and all overshoots due to system or tester noise are included. 3/ Subgroups 1, 2, and 3 tests for ICC2shall be tested to the calculated limit for initial test and after any design or process changes which may affect this parameter.

44、 To calculate ICC2at any given operating frequency, use ICC1+ (1 mA/mHz) x (1/fosi+ 1/foso)/2. 4/ 1/fO (tPHSI+ tPLSI), 1/fO (tPHSO+ tPLSO). 5/ The parameters tSSIand tHSIapply when memory is not full. 6/ The parameters tSIRand tHIRapply when memory is full, SI is high and minimum bubblethrough (tBT)

45、 conditions exist. 7/ At any given operating condition tPIR (tPHSOrequired). 8/ At any given operating condition tPOR (tPHSIrequired). 9/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I. 10/ The

46、 parameter tDHZOEtransition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input with the load in figure 3, circuit B. The parameter tDLZOEis measured 100 mV from steady-state voltage with the load in figure 3, circuit B. 11

47、/ All data outputs will be at low level after reset goes high until data is entered into the FIFO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89664 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

48、0 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Device types All Case outlines X, Y, and 3 Terminal number Terminal symbol 1 AFE 2 HF 3 IR 4 SI 5 DI06 DI17 GND 8 DI29 DI310 DI411 DI512 DI613 DI714 NC 15 OE 16 DO717 DO618 DO519 DO420 DO321 DO222 GND 23 DO124 DO025 OR 26 SO 27 MR 28 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduct