DLA SMD-5962-89565 REV A-1991 MICROCIRCUIT LINEAR DUAL 8-CHANNEL MULTIPLEXER WITH PRECISION SAMPLE AND HOLD HYBRID《精确取样保持双重8通道多路复用器的线性混合微型电路》.pdf

《DLA SMD-5962-89565 REV A-1991 MICROCIRCUIT LINEAR DUAL 8-CHANNEL MULTIPLEXER WITH PRECISION SAMPLE AND HOLD HYBRID《精确取样保持双重8通道多路复用器的线性混合微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89565 REV A-1991 MICROCIRCUIT LINEAR DUAL 8-CHANNEL MULTIPLEXER WITH PRECISION SAMPLE AND HOLD HYBRID《精确取样保持双重8通道多路复用器的线性混合微型电路》.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、4 REVISIONS throghout . 1 SMD-5762-89565 REV A 59 = 9999996 0003856 5 , =FI? SHEET REV STATUS OF SHEETS II PMIC NIA STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILABLE 3RUSEBYALLDEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA DEFENSE ELECTRONICS SUPPLY CENTER MICROCIRCUIT, LINEAR,

2、 DUAL 8-CHANNEL MULTIPLEXER WITH PRECISION SAMPLE AND 9 AUGUST 1989 A I SHET 1 OF 12 I 1 DESC FORM 193 SEP 87 DISTRIBUTION STATEMENT A. Approved for public release; dislribulion Is unliniited. d US. GOERNMENT PRINTING OFFICE: 1987 - 748119/Mp1 I 5962-EO98 Provided by IHSNot for ResaleNo reproduction

3、 or networking permitted without license from IHS-,-,-SMD SIZE A STANDARDIZED 1. SCOPE 5962-89565 1.1 SCO e. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following exampl e: 5962-89565 O1 I 7- This drawing describes device requirements for class H hybrid microcircu

4、its to be processe + in accordance with MIL-H-38534. l i i I I i Drawing number Devici type Ease outifne Lead flnish per (See 1.2.1) (See 1.2.2) MIL-H-38534 1.2.1 Device type(s). The device typds) shall identify the circuit function as follows: Device type Generic, ,number Ci rcut function o1 HS362

5、12-bit data acquisition system front end network (accepts either 8 differential or 16 single-ended inputsf 1.2.2 Cas-e outl-ine(s). The case outline(s) shall be as designated in appendix C of MIL-M-38510, and as follows: Outline letter Case outline X Figure 1 (32-lead, 1.695“ x 1.09“ x .130“), dual-

6、in-line package 1.3 Absolute maximum ratings. Pocitive supply voltage (Vcc) L/ - - - - - - - - - - - Negative supply voltage (VEE)- - = - - - - - - - - - - Logic supply voltage (YDD) - - - - - - - - - - - - - - Logic inputs range - - - - - - - - - - = - - - - - - - Signal inputs- - - I - - - - - - -

7、 - - - - - *16 Y +16 v dG -16 Y dc t5.5 Y dc O to t5.5 Y dc *l v -55C to +150G *300c 1.0 w OC/W 4OoC6W +150 G Analog ground to digital ground- - - - - - - - - - - - Storage temperature range- - - = - - - - - - - - - - - Lead temperature (soldering, 10 seconds) 7 - - - - - - Power disclpation (PD) -

8、- - - - - - - - - - - - - - - Thermal resistance, junction-to-case (8J - - - - - - Thermal resistance, junction-to-ambient FjAi- - - - - Junction temperature (Tjl- - - - - - - - - - - - - - - 1.4 Recommended operating conditions. 2/ i/ Positive supply voltage range- - - - - - - - - - - = - Logic sup

9、ply voltage range - - - - - - - - - - - - - - Ambient operating temperature range (TA) - - - - - - - t14.25 V dc to t15.75 V dc t4.25 Y dc to t4.75 V dc -55C to +125C Negative supply voltage range- - - - - - - - - - - - - -14.25 Y dC to -15.75 V dc mitive analog supply voltage must remain 2 positive

10、 digital supply voltage. 2/ The power supplies should be sequenced in this order: +15 Y, -15 Y, t5.0 V to avoid latch-up. For hold capacitor use a 2000 pF teflon capacitor similar to DESC drawing part number 88012- 11 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

11、cense from IHS-,-,-SMD-5962-89565 REV A 59 9999996 0003858 9 2. APPLICABLE DOCUMENTS 2.1 Government specifications and standard. Unless otherwise specified, the following specifications and standard of the issue listed in that issue of the Department of Defense Index of Specifications and Standards

12、specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATIONS MILITARY MIL-M-38510 - Microcircuits, General Specification for. MIL-H-38534 - Hybrid Microcircuits, General Specification for. STANDARD MILITARY MIL-STO-883 - Test Mehods and Procedures for Mic

13、roelectronics. (Copies of the specifications and standard required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity. 1 references cited herein, the text of this drawing shall take precedence

14、. 2.2 Order of precedence. 3. REQUIREMENTS 3.1 In the event of a conflict between the text of this drawing and the Item requirements. The individual item requirements shall be in accordance with MIL-H-38534 and as specified herein. 3.2 Design, construction, and physical dimensions. The design, const

15、ruction, and physical dimensions chal 1 be as specitied in MIL-H-58554 and herein. 3.2.1 Case outline(s). 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). 3.2.4 Logic diagradcl. 3.3 Electrical performance characteristics. Unless otherwise

16、specified, the electrical The case outline(s) shall be in accordance with 1.2.2 herein. The truth table(s) shall be as specified on figure 3. The logic diagram(s) shall be as specified on figure 4. performance characteristics are as specified in table I and apply over the full ambient operating temp

17、erature range. specified in table II. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups The electrical tests for each subgroup are described in table I. STANDARDIZED SIZE MILITARY DRAWING A 5962-89565 DEFENSE ElECTRONKS SUPPLY CENTER 7iEVICION LEVEL SHEET DAYT

18、ON, OH#) 45444 A 3 t U. 9. GOVERNMENT PRINTING OFFICE 1890-549-249 iESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-895b5 REV A 59 9999996 0003859 O - - - STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CE“EF DA

19、YTON, OHIO 45444 t SIZE 5962-89565 A SHEET 4 TABLE I. Electrical performance characteristics. I I t 1 I IT1 I I VDD = t5.0 V dc I l Min I Max I I I I I I Test ISymbol f Candi t ions 1/ I Group A I Limits I Unit -59OC T = +125C -16 v - de, Isubgroupsl I IVcc = +15 Y dC, l I unless otherwise specified

20、 I Analog i.nputs Input bias current,. per channel Input impedance 2/ input fault current z/ Common mode rejection ratio MUX crosstalk Input offset vol tage n, Accuracy Offset error vdtage Linearity error 1 ZIN ZIN IF .CMRR vos TA = +%OC 1 1 I I ON channel, parallel, CL = 100 pF I 4,5,6 I I OFF chan

21、nel , parallel , CL = 10 pF I I Internally 1 imi ted I ,2,3 I At 1.0 kHz, 20 VP+ on 14 differential input I TA = +25“C t I I at 1.0 kHz, 2Q I I I Any OFF channel to any ON: channel I 4 TA = +25C I Channel to channel I 1,2,3 I 1 I 1 I I I I T I I I I I -i I I I I I -t - *50 I nA I -I- I _ir_ L0,OO I

22、Mn I I 1 20 I mA I / dB I I I I I -80 I dB -+ I500 I KV I iii I I I I *4. i mv I I I 1 I I 1 1 1 I *0.0051 %FSR I I I I- I I I 2,3 I t0.010 I E i At 1.0 mvp-p i 4 i 0.1 i 1.0 i MHz I I I I I I I GaIn error See footnotes at end of table. i I E 1 TA = +25C 141 I *O.OZ I %FSR I I I I I I At 2.0 mVp-p 1

23、 5,6 I i I I I I E Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TABLE I. Electrical performance characteristics - Continued. - STANDARDIZED SIZE MILITARY DRAWING A I I I I I I -55C 5 TA +125“C - Isubgroupsl I IiI I I VDD = +5.0 V dc I I Min I Max

24、I I I I unless otherwise specified I I I I Conditions I Group A I Limits I Unit ISymbol IAAE/AT I VIN = 0 Y, TA = -55oc, +125C Test IVcc = +15 V dc, VET = -15 V dc, I Temperature drift Gain drift f t2. Ippm/oC Off set drift IAVOE/ATI VIN = i10 V, TA = -55“C, +125“C I 2,3 I I t4.0 Ippm/“C Power suppl

25、y requirements I I 5,6 I I I I I I I I I I I I 5962-89565 I I I Positive supply currentlICC 1 Mo load, grounded I 1,2,3 I 130 ImA I I I I I I I I I I I Negative supply currentlIEE I Inputs track mode I 1,2,3 I I I I I I I Logic supply current IDD I I 1,2,3 I I 30 I I I I I Sample and hold dynamics A

26、cquisition time Sample to hold step I I TA = +25“C 111 I 6.0 I mV Settl i ng time its I Hold mode to tl.0 mV of I 9,10,11 I I 600 I ns I I 7.0 I lo ItACQ i For 20 v step to 0.01% of final I g,10,1i I I I I Iis I I I I I I I I I I I I I I I I I I I final value I I I I I I I I I I I - 3/ Feedthrough I

27、FT I At 1.0 kH, 20 Vp-p I 4 -70 1-60 I dB Droop rate IVDR I TA = +25“C 141 I 1.0 I mv/ms Aperture delay 21 /tAD I I 9,10,11 I I 225 1 ns See footnotes at end of table. I I I ll I I TA = +25“C I I I I I I I I I I I ESC FORM 193A t U. EI. GOVERNMENT PRINTING OFFICE 1090-549*249 SEP 87 Provided by IHSN

28、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5962-89565 REV A 59 9999996 00038bL 9 SIZE A STANDARDIZED TABLE I. Electrical performance characteyisti.cs - Continued. I I I I I I I -55C i +125OC - IVcc = +15 V 6, 8, = -15 V dc, I Min I Max I I I I I, I I I I I

29、 unless otherwise specified I I I I I I I I I I I I I Functional test I !See 4.3.1 and figure 3 I 7,8 I I I I I I. . ,I I .I I Test !Symbol I Conditions i/ I Group A I Limits I Unit fsubgroups IiI VDD = t5. V dc Sample, and hold dynamics - Cantinued. Aperture uncertainty z/ I tAU I I 9,1D,11 I I 10

30、I ns I - 1/ The power supplies should be sequenced in this order Vcc, VEE, and VDD to avoid latch-up. - 2/ Parameters shall be tested as part of device initial characterization and after design and process change. Parameter shall be guaranteed to the limits specified in table I for all lots not spec

31、 i fica1 1 y tested. For optimum acquisition time performance the analog input should be buffered with a low output impedance. - 3/ 5962-89565 3.5 Markin . Marking shall be in accordance with MIL-H-38534. The part shall be marked with the PIN lisdi.2 herein. QML-38534 (see 6:6 herein) manufacturer o

32、f the part described herein shall submit for DESC-ECC review and approval electrical test data (variables format) on 22 devices from the initial quality conformance inspection group A lot sample, produced on the certified line, for each device type listed herein. The data should also include a summa

33、ry of all parameters manually tested, and for those which, if any, are .guaranteed. in order to be listed as an approved source of supply in QML-38534 (see 6.6 herein). certificate of compliance submitted to DESC-ECC prior to listing as an approved source of supply shall affirm that the manufacturer

34、s product meets the requirements of MIL-H-38534 and the requirements herein. provide2 with each lot of microc$rcu$ts delivered to this drawing. In addition, the manufacturers PIN may also be marked as listed in 3.6 Manu,facturer eljgibil ity. In addition to the general requirements of MIL-ti-38534,

35、the 3.7 Certificate .of compliance. A certificate of compliance shall be required from a manufacturer The 3.8 Certificate of conformance. A certificate of conformance as required in MIL-H-38534 shall be I DEFENSE ELECTRONICS SUPPLY Cm DAYTON. OHIO 45444 3.“ LEVEL A I SHEET 5 IESC FORM 193A SEP a7 U.

36、 8. GOVERNMENT PRINTING OFFICE 1990-549-249 u Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I at- 1.695 I.005 . O60 4 k.100 I.005 TYP NOTES: 1. Dimensions are in inches. 2. Metric equivalents are for general information. FIGURE 1. Case outline. Inc

37、hes .o01 .o02 .O03 .O04 .O05 . O10 ,012 .O25 .O30 .O35 .O40 .O45 020 REF REF mm Inches 0.03 .O60 0.05 .loo 0.08 .120 0.10 .130 0.13 .205 0.25 .230 0.30 .860 O .64 .goo 0.76 1.090 0.89 1.530 1.02 1.565 1.14 1.695 mrn 1.52 2.54 3.05 3.30 5.21 5.84 21.84 22.86 27.68 38.62 39.75 43.05 STANDARDIZED SIZE

38、MILITARY DRAWING A 5962-89565 DEFENSE ELECTRONICS SUPPLY CENTER nEVICION LEVEL SHEET DAMON, OHIO 45444 A 7 SC FORM 193A SEP 87 U. 9. QOVERNMENT PRINTING OFFICE 1990-549-249 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-87565 REV A 59 m 999

39、9996 0003863 2 m SIZE A STANDARDIZED I I. Device type L. 5962-89565 - i Case outline I I I Terminal number I I I 1 I 2 I 3 4 5 6 7 I 1 8 9 I 1 t i0 I 11 I 12 t 13 14 15 1 I I 16 17 18 I I 19 20 I 21 I 22 I 23 I 24 I I 25 26. I 27 I 1 I 28 29 30 I I I. 31 I 32 ; I FIGURE 2. o1 I 1 X 1 I Termi na1 sym

40、bol I I SF/RIFF mode select t YDD Digi ha1 ground Analog input, channel 7 Analog input, channel 6 Analog input, channel 5 Analag tnput, channel 4 Analog input, channel 3 Analog input, channel 2 Analog input, channel 1 Analoq inout. channel O Hold capaki tor Sampl /hol d command Offset adjust Off set

41、 adjust Analog output Analog ground Analog input, channel 15 Analog input, channel 14 Analog input, channel 13 Analog input, channel 12 Analog input, channel 11 Analog input, channe7 10 Analog input, channel 9 Analog input, channel 8 Input channel address, bit AE Input channel address, bft Ao Input

42、channel address, bit At YEE “cc Input channel address, bit Ai Channel latch Termi na1 connections. DEFENSE ELECTRONICS SUPPLY CENTER 3EVISION LEVEL SHEET 1 AYQN, OHIO 45444 8 ESC FORM 193A SEP 87 U. 8. GOVERNMENT PRINTING OFFICE 1990-549-249 Provided by IHSNot for ResaleNo reproduction or networking

43、 permitted without license from IHS-,-,-“ I I I I I I TTL logic I MUX configuration I I I input I I I I 1 ISingle-ended, 16 channels I I I I WDIFF I I mode select I I I I (pin 1) 1 I I I O IDifferential, 8 channels I - SE/DIFF mode select truth table. On channel (pin number) i Differential I I Addre

44、ss i AE A2 A1 Ao ISingle-ended I Hi LO“ o o o o i o (11) o o o 1 I 1 (10) o o 1 o I2(9) O O 1 1 I3(81 o 1 o o i 4i7) O 1 O 1 I5(6) O 1 1 O I 6(5) o 1 1 1 I7(4) 1 O O O I 8 (27) 1 O O 1 I 9 (26) i O 1 O I 10 (25) 1 O 1 1 I 11 (24) I 1 O O I 12 (23) 1 1 O 1 I 13 (22) 1 1 1 O I 14 (19) 1 1 1 1 ! 15 (18

45、) 1 I I I I I I I I I I I None No ne None None None None None None O(11) O(27) U101 l(26) I I _ SND-59b2-895b5 REV A 59 9999996 0803864 4 Input channel addressing truth table. I I I I TTL logic I Input address I I I I input I I I I i Channel latch i 1 IAddress passes to MUX I I inputs I I I I (pin 3

46、2) I I O IAddress latched i I I I I I Channel latch truth table. FIGURE 3. Truth tables. MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER U. 8. GOVERNMENT PRINTING OFFICE 1990-549-249 ;EP - .- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-59

47、b2-895b5 REV A 59 999999b 0003865 b f 4 HIGH ANALOG INPUTS L r LOW ANALOC1 . INPUTS INPUT CHANNEL ADDRESS FIGURE 4. Logic di-agram. I. 16 -u rNALOG OUTPUT SIZE 5962-89565 . - - ,A STANDARDIZE3 . MILITARY DRAWING PEVIWN LEVEL SHEET Y ,10 A DEFENSE ELECTRONICS SUPPLY CENEFI DAYTON, OHIO 45444 , US GOV

48、ERNMENT PRINTING OFFICE 1990.750.527R DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-89565 REV A 59 m 9999996 0003866 m - 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with YIL-H-38534. 4.2 Screenin . Screening shall be in accordance with MIL-H-38534. The following additional :ri teridppi y: a. Burn-in test, method 1015 of MIL-STD-883. (i) Test condition A, By C, or D using the circuit submitted with the