DLA SMD-5962-89483 REV E-2008 MICROCIRCUIT LINEAR CMOS QUAD UNIVERSAL FILTER BUILDING BLOCK MONOLITHIC SILICON《CMOS型四高性能通用滤波器积木的线性微电路技术规范》.pdf

《DLA SMD-5962-89483 REV E-2008 MICROCIRCUIT LINEAR CMOS QUAD UNIVERSAL FILTER BUILDING BLOCK MONOLITHIC SILICON《CMOS型四高性能通用滤波器积木的线性微电路技术规范》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89483 REV E-2008 MICROCIRCUIT LINEAR CMOS QUAD UNIVERSAL FILTER BUILDING BLOCK MONOLITHIC SILICON《CMOS型四高性能通用滤波器积木的线性微电路技术规范》.pdf（11页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change total supply voltage in 1.3. Change in table I; output voltage swings test limits, clock to center frequency ratio, with conditions sides A, B, C, and pin 17 high, also side D pin 17 high, test limits, Q accuracy test limits. Add clock to

2、center frequency, side-to-side matching test. Change dc offset voltage test conditions and limits. Change power supply current test conditions and limits. Change subgroups for output voltage swing in table I and groups C and D end-point electricals in table II. Editorial changes throughout. 92-03-23

3、 M. A. FRYE B For fCLK/fO, QACC, fOvs fOtests under Table I, delete subgroups 7, 8A, 8B and substitute 1, 2, 3. For VOS1, VOS2, VOS3tests under table I, delete subgroups 4, 5, 6 and substitute 1, 2, 3. Add subgroups 7, 8A, and 8B to paragraph 4.3.1. Delete subgroups 7, 8A, and 8B from Table II. Chan

4、ges in accordance with N.O.R. 5962-R017-93. 92-12-15 M. A. FRYE C For the total supply voltage specified under paragraph 1.3, delete 16.5 V dc and substitute 16.0 V dc. Changes in accordance with N.O.R. 5962-R149-95. 95-06-02 M. A. FRYE D For the ICCtest under Table I, subgroup 1, delete 22 mA and s

5、ubstitute 23 mA. Changes in accordance with N.O.R. 5962-R105-96. 96-04-16 M. A. FRYE E Drawing updated to reflect current requirements. Redrawn. - ro 08-07-08 R. HEBER THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV E E E E E E E E E E OF SHEETS SHEET 1 2

6、 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY JOSEPH A. KERBY CHECKED BY CHARLES E. BESORE DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY CHARLES REUSING STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPAR

7、TMENT OF DEFENSE DRAWING APPROVAL DATE 90-10-30 MICROCIRCUIT, LINEAR, CMOS, QUAD, UNIVERSAL FILTER BUILDING BLOCK, MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-89483 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E425-08 Provided by IHSNot for ResaleNo reproduction or networkin

8、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class lev

9、el B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89483 01 L A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s

10、) identify the circuit function as follows: Device type Generic number Circuit function 01 LTC1064 CMOS, quad, universal filter building block 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L

11、GDIP3-T24 or CDIP4-T24 24 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Total supply voltage (+VSto VS) 16.0 V dc Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Power dissipation

12、 (PD) 500 mW Junction temperature (TJ) . +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) 60C/W 1.4 Recommended operating conditions. Supply voltage (VS) 5 V dc Operating supply voltage range 2.37 V dc to 8.0 V dc Ambient operating tempe

13、rature range (TA) . -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DO

14、CUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF D

15、EFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - L

16、ist of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of

17、 precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item r

18、equirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufactur

19、er who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make m

20、odifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is

21、 used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connectio

22、ns shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Equivalent input offsets. The equivalent input offsets shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrica

23、l performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table

24、I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics

25、. Test Symbol Group A subgroups Device type Limits Unit Conditions -55C TA +125C VS= 5.0 V unless otherwise specified Min Max Internal operational amplifiers Output voltage swings VOUTRL= 5.0 k 4 01 -3.2 +3.2 V 5,6 -3.1 +3.1 Complete filter (TTL clock input level, unless otherwise specified) Clock t

26、o center frequency ratio fCLK/ fOSides A, B, and C = mode 1, R1 = R3 = 50 k, R2 = 5.0 k, fCLK= 1.0 MHz, Q = 10, fO= 20 kHz, pin 17 high, (condition A) 1,2,3, 01 49.6 50.4 Side D = mode 3, R1 = R3 = 50 k, R2 = R4 = 5.0 k, fCLK= 1.0 MHz, Q = 10, fO= 20 kHz, pin 17 high, (condition B) 49.55 50.45 Sides

27、 A, B, and C = mode 1, R1 = R3 = 50 k, R2 = 5.0 k, fCLK= 1.0 MHz, Q = 10, fO= 10 kHz, pin 17 low, (condition C) 99.2 100.8 Side D = mode 3, R1 = R3 = 50 k, R2 = R4 = 5.0 k, fCLK= 1.0 MHz, Q = 10, fO= 10 kHz, pin 17 low, (condition D) 99.1 100.9 Provided by IHSNot for ResaleNo reproduction or network

28、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Group A subgroups Device type Limi

29、ts Unit Conditions -55C TA +125C VS= 5.0 V unless otherwise specified Min Max Complete filter (TTL clock input level, unless otherwise specified) - Continued. Q accuracy QACCSides A, B, and C = mode 1, fCLK= 1.0 MHz, Q = 10 1,2,3 01 -6.0 6.0 % Side D = mode 3, fCLK= 1.0 MHz, Q = 10 -8.0 8.0 Clock to

30、 center frequency ratio; side-to-side matching fOvs fOfCLK/ fOconditions A through D. 1,2,3 01 -1.0 1.0 % DC offset voltage VOS1fCLK/fO= 50:1, fCLK= 1.0 MHz, see figure 3 1,2,3 01 -15 15 mV VOS2-45 45 VOS3fCLK/fO= 50:1 and 100:1, fCLK= 1.0 MHz, see figure 3 -45 45 Power supply current ICCVS= 5.0 V 1

31、 01 23 mA 2,3 26 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitat

32、ions, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“

33、certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate o

34、f compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, a

35、ppendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option

36、 to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

37、62-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline L Terminal number Terminal symbol 1 INV B 2 HPB / NB 3 BPB 4 LPB 5 SB 6 AGND 7 +VS8 SA 9 LPA 10 BPA 11 HPA / NA 12 INV A 13 INV D 14 HPD 15 BPD 16 LPD 17 50 /

38、100 18 CLK 19 -VS20 SC 21 LPC 22 BPC 23 HPC / NC 24 INV C FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISIO

39、N LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Operational notes. 1. By tying pin 17 to V+, all sections operate with (fCLK/ fO) = (50:1). 2. By tying pin 17 to V-, all sections operate with (fCLK/ fO) = (100:1). 3. By tying pin 17 to AGND, sections B and C operate with (fCLK/ fO) = (50:1) and sections A a

40、nd D operate at (100:1). FIGURE 2. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97

41、NOTE: This represents one quarter of the filter building block. FIGURE 3. Equivalent input offsets. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-39

42、90 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devi

43、ces prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing o

44、r acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in

45、 table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The

46、following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 7, 8A, 8B, 9, 10, and 11 in table I, method 5005 of MIL-STD-883 shall be omitted. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as spec

47、ified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition C. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test c

48、ircuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89483 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 TABLE II. El