DLA SMD-5962-88504 REV D-2006 MICROCIRCUIT DIGITAL BIPOLAR FIELD PROGRAMMABLE LOGIC ARRAY (FPLA) MONOLITHIC SILICON《硅单片现场可编程逻辑阵列(FPLA)两极化数字微电路》.pdf

《DLA SMD-5962-88504 REV D-2006 MICROCIRCUIT DIGITAL BIPOLAR FIELD PROGRAMMABLE LOGIC ARRAY (FPLA) MONOLITHIC SILICON《硅单片现场可编程逻辑阵列(FPLA)两极化数字微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-88504 REV D-2006 MICROCIRCUIT DIGITAL BIPOLAR FIELD PROGRAMMABLE LOGIC ARRAY (FPLA) MONOLITHIC SILICON《硅单片现场可编程逻辑阵列(FPLA)两极化数字微电路》.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change in table I, IOZparameter. Also changes to footnotes 3 and 4. Editorial changes throughout. 89-05-18 M. A. Frye B Changes in accordance with NOR 5962-R227-92. 92-06-24 M. A. Frye C Update drawing to current requirements. Removed logic diagr

2、am. Editorial changes throughout. - gap 01-10-18 Raymond Monnin D Boilerplate update part of 5 year review. ksr 06-08-18 Raymond Monnin THE ORIGINAL FRONT PAGE HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY

3、James E. Jamison STANDARD MICROCIRCUIT DRAWING CHECKED BY Wm. J. Johnson DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-01-2

4、2 MICROCIRCUIT, DIGITAL, BIPOLAR, FIELD PROGRAMMABLE, LOGIC ARRAY (FPLA), MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-88504 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E586-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

5、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88504 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL

6、-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88504 01 L X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follow

7、s: Device type Generic number Circuit function 01 PLS161 (12 x 48 x 8) programmable logic array 02 PLS173 (22 x 42 x 10) programmable logic array 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style

8、 L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (VCC) +7.0 V dc Input voltage (VI): Device 01 +5.5 V dc Device 02 +10 V dc Storage temperature range . -65C to +150C Maximum power d

9、issipation 1/ . 1.0 watt Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC): Case L See MIL-STD-1835 Junction temperature (TJ) +200C Output sink current +100 mA 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc to +5.5 V dc Minimum high level

10、input voltage (VIH) +2.0 V dc Maximum low level input voltage (VIL) . +0.8 V dc Case operating temperature range (TC) -55C to +125C 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

11、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-88504 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2.1 Government specification, standards, and handbooks. The following specification, standards and handbooks form a part of this drawing to the extent

12、 specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method S

13、tandard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.

14、mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing

15、 shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B

16、 devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the ma

17、nufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These mod

18、ifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as speci

19、fied in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the elec

20、trical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in tabl

21、e I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where the entire SMD PIN number is not feasible due to space limitations, the manufacturer

22、has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in a

23、ccordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88504 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET

24、 4 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source

25、of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to t

26、his drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentati

27、on. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection i

28、n the contract, using an altered item drawing. 3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 4.3.1c and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configurat

29、ion. 3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 4. VERIFICATION 4.1 Sampling and inspection. Sampling

30、and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in t

31、est, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases

32、, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at

33、the discretion of the manufacturer. c. All devices processed to an altered item drawing may be programmed either before or after burn-in at the manufacturers discretion. The required electrical testing shall include, as a minimum, the final electrical tests for programmed devices as specified in tab

34、le II herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88504 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 4.3 Quality conformance inspection.

35、Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5

36、005 of MIL-STD-883 shall be omitted. c. Unprogrammed devices shall be tested for programmability and ac performance compliance to the requirement of group A, subgroups 9, 10, and 11. Either of two techniques is acceptable: (1) Testing the entire lot using additional built-in test circuitry which all

37、ows the manufacturer to verify programmability and ac performance without programming the user array. If this is done, the resulting test patterns shall be verified on all devices during subgroups 9, 10, and 11, group A testing in accordance with the sampling plan specified in MIL-STD-883, method 50

38、05. (2) If such compliance cannot be tested on an unprogrammed device, a sample shall be selected to satisfy programmability requirements prior to performing subgroups 9, 10, and 11. Twelve devices shall be submitted to programming. If more than two devices fail to program, the lot shall be rejected

39、. At the manufacturers option, the sample may be increased to 24 total devices with no more than four total device failures allowable. Ten devices from the programmability sample shall be submitted to the requirements for group A, subgroups 9, 10, and 11. If more than two total devices fail, the lot

40、 shall be rejected. At the manufacturers option, the sample may be increased to 20 total devices with no more than four total device failures allowable. d. Subgroups 7 and 8 must verify input to output logic combinations. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be

41、as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon

42、request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4 Programming

43、 procedures. The programming procedures shall be as specified by the device manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88504 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISIO

44、N LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C Device types Group A subgroups Limits Unit unless otherwise specified Min Max Low level input voltage VILVCC= 4.5 V All 1, 2, 3 0.8 V High level input voltage VIHVCC= 5.5

45、V All 1, 2, 3 2 V Input clamp voltage 2/ VICVCC= 4.5 V, II= -18 mA All 1, 2, 3 -1.2 V Low level input current IILVCC= 5.5 V, VI= 0.45 V All 1, 2, 3 -150 A High level input current IIHVCC= 5.5 V, VI= 5.5 V All 1, 2, 3 50 A Low level output VOLVCC= 4.5 V, IOL= 9.6 mA 01 1, 2, 3 0.5 V voltage 4/ VIH= 2

46、 V, VIL = 0.8 V IOL= 12 mA 02 0.5 High level output VOHVCC= 4.5 V, VIL= 0.8 V, All 1, 2, 3 2.4 V voltage 3/, 9/ VIH= 2 V, IOH= -2 mA Output short circuit IOSVCC= 5.5 V, VO= 0 V All 1, 2, 3 -15 -85 mA current 2/, 5/, 6/ DC supply current 7/ ICCVCC= 5.5 V 01 1, 2, 3 180 mA 02 1, 2, 3 170 mA 3-state ou

47、tput IOZVCC= 5.5 V VOUT 01 1, 2, 3 60 A current 8/ = 5.5 V I/O pins only VOUT01 -60 = 0.45 V OUT02 110 =5.5 V VOUT02 210 = 0.45 V Functional tests See 4.3.1d All 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

48、DARD MICROCIRCUIT DRAWING SIZE A 5962-88504 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C Device types Group A subgroups Limits Unit unless otherwise specified Min Max Propagation delay tPDVCC= 5.0 V 10% 01 9, 10, 11 70 ns output to input R1 = 470, R2 = 1 K, See figures 2 and 3 02 9, 10, 11 40 ns Propagation delay tCE01 9, 10, 11 50 ns chip enable Propagation delay 9/ tOE02 9, 10, 1