DLA SMD-5962-84030 REV E-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL BUS TRANSCEIVERS MONOLITHIC SILICON《硅单片总线接收器 TTL肖脱基高级小功率双极数字微型电路》.pdf

《DLA SMD-5962-84030 REV E-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL BUS TRANSCEIVERS MONOLITHIC SILICON《硅单片总线接收器 TTL肖脱基高级小功率双极数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-84030 REV E-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL BUS TRANSCEIVERS MONOLITHIC SILICON《硅单片总线接收器 TTL肖脱基高级小功率双极数字微型电路》.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change tPLH, tPHL, tPZH, tPZL, and tPLZ. Remove vendor, FSCM 04713. 85-09-28 W. Heckman B Convert to military drawing format. Split VILinto temperatures. Add figures 2 and 4. Change propagation delays. Add footnotes to table I. Editorial changes

2、throughout. Change in table II. Add CAGE 27014 and CAGE 18324. Change in 1/ of paragraph 1.3 Change in paragraph 1.4. Add case outline S. Add VOHat -0.4 mA. Change text conditions for IIL, IIH, IO, and the propagation delay times. Delete tests IOZLand IOZHin table I. 88-05-13 W. Heckman C Made edito

3、rial changes throughout. Added test condition C to 4.2 and 4.3.2 step 1. Add vendor CAGE code 27014 to flat package. Made waveform voltage level clarification for propagation delay. 89-10-10 W. Heckman D Changes in accordance with NOR 5962-R242-92. 92-08-19 Monica L. Poelking E Redraw with changes.

4、Update to current requirements. Editorial changes throughout. - gap 05-11-09 Raymond Monnin CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCI

5、RCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY TTL, BUS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DAT

6、E 84-05-01 TRANSCEIVERS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 84030 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E031-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUP

7、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN

8、). The complete PIN is as shown in the following example: 84030 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS245A Octa

9、l bus transceivers with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or GDIP2-T20 20 Dual-in-line S GDFP2-F20 or GDFP3-F20 20 Flat 2 CQCC1-N20 20 Square chip

10、carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range (All inputs) . -1.5 V dc at -18 mA to +7.0 V dc Input voltage range (I/O ports) . -1.5 V dc at -18 mA to +5.5 V dc St

11、orage temperature range -65C to +150C Maximum power dissipation (PD) 1/. 346.5 mA Lead temperature range (soldering 10 seconds) +300C Thermal resistance, junction to case (JC). See MIL-M-38510, appendix C Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage (VCC) 4.5

12、V dc to 5.5 V dc Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL): VIL= +125C . 0.7 V dc VIL= +25C . 0.8 V dc VIL= -55C 0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the ad

13、ded PDdue to short circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABL

14、E DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT

15、OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103

16、 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, P

17、A 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

18、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual

19、item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted tran

20、sitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirem

21、ents herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construct

22、ion, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specifi

23、ed on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching circuit and waveforms. The switching circuit and waveforms shall be as specified on figure 4. 3.3 Electrical performance cha

24、racteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The

25、 electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A complian

26、ce indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance

27、. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product

28、meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification

29、of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available ons

30、hore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical

31、 performance characteristics. Limits Test Symbol Conditions -55C TC+125C unless otherwise specified Group A subgroups Min Max Unit VOH1 IOH= -0.4 mA 1, 2, 3 2.5 VOH2 IOH= -3.0 mA 1, 2, 3 2.4 High level output voltage VOH3 VCC= 4.5 V, VIH= 2.0 V, VILat: +125C = 0.7 V -55C = 0.8 V +25C = 0.8 V 2/ IOH=

32、 -12 mA 1, 2, 3 2 V VIL= 0.7 V 2 Low level output voltage VOLVCC= 4.5 V, VIH= 2.0 V, IOL= 12 mA 2/ VIL= 0.8 V 1, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.5 V control inputs IIH1VCC= 5.5 V, unused inputs = 0 V A or B ports VIN= 2.7 V 1, 2, 3 20 A control inputs VIN= 7.0 VHigh

33、 level input current IIH2A or B ports VIN= 5.5 V1, 2, 3 0.1 mA Low level input current IILVCC= 5.5 V, VIN= 0.4 V, unused inputs 4.5 V, control inputs and A or B ports 1, 2, 3 -0.1 mA Output current IOVCC= 5.5 V, 3/ VOUT= 2.25 V 1, 2, 3 -20 -112 mA ICCH48 ICCL60 Supply current ICCZVCC= 5.5 V 1, 2, 3

34、63 mA Functional tests See 4.3.1c 4/ 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC

35、 FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC+125C unless otherwise specified Group A subgroups Min Max Unit tPLH1 13 Propagation delay time, A or B to B or A tPHL9, 10, 11 1 12 ns tPZH2 22 Enable time from G to A or B tPZL9, 10,

36、 11 2 25 ns tPHZ12 Disable time from G to A or B tPLZVCC= 4.5 V to 5.5 V CL= 50 pF R1= 500 R2= 500 5/ See figure 4 9, 10, 11 2 20 ns 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be

37、floated. 2/ All outputs must be tested. In the case where only one input at VIL maximum or VIH minimum produces the proper output state, the test must be performed with each input being selected as the VIL maximum or the VIH minimum input. 3/ The output conditions have been chosen to produce a curre

38、nt that produce a current that closely approximates one-half of the true short-circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at input test conditions of GND VIL

39、 VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

40、 OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. CASE 2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

41、 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 EnableG Direction control DIR Operation L L B data to A bus L H A data to B bus H X Isolation H = High voltage level L = Low voltage level X = Irrelevant FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or ne

42、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networkin

43、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 10

44、Mhz, duty cycle = 50 percent, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with inter

45、nal conditions such that the output is high except when disabled by the output control. 5. When measuring propagation delay times of three-state outputs, switch S1 is open. FIGURE 4. Switching waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitte

46、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84030 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535

47、, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, C, or D. The

48、 test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II