DLA SMD-5962-77049 REV J-2005 MICROCIRCUIT DIGITAL-LINEAR TTL DUAL PERIPHERAL DRIVERS MONOLITHIC SILICON《硅单片TTL双重外围驱动器 线性数字微型电路》.pdf
《DLA SMD-5962-77049 REV J-2005 MICROCIRCUIT DIGITAL-LINEAR TTL DUAL PERIPHERAL DRIVERS MONOLITHIC SILICON《硅单片TTL双重外围驱动器 线性数字微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-77049 REV J-2005 MICROCIRCUIT DIGITAL-LINEAR TTL DUAL PERIPHERAL DRIVERS MONOLITHIC SILICON《硅单片TTL双重外围驱动器 线性数字微型电路》.pdf(9页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED F Add device type 02. Changes to absolute maximum rating and Table I. Editorial changes throughout. Delete vendor CAGE 34333. 93-02-18 M. A. FRYE G Make change to high level input current test as specified under Table I. Editorial changes throughou
2、t. ro 00-07-18 R. MONNIN H Update drawing to current requirements. -drw 03-01-15 R. MONNIN J Make correction to marking paragraph 3.5. -rrp 05-05-11 R. MONNIN THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV J J J J J J J J OF SHEET
3、S SHEET 1 2 3 4 5 6 7 8 PMIC N/A PREPARED BY A. J. FOLEY DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY C. R. JACKSON COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. HAUCK MICROCIRCUIT, DIGITAL-LINEAR, T
4、TL DUAL PERIPHERAL DRIVERS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 77-10-12 AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 14933 77049 SHEET 1 OF 8 DSCC FORM 2233 APR 97 5962-E332-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without
5、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77049 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in acc
6、ordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 77049 01 P X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit functio
7、n as follows: Device type Generic number Circuit function 01 55452 Dual peripheral NAND driver 02 55451 Dual peripheral AND driver 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style P GDIP1-T8 or
8、CDIP2-T8 8 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (VCC) +7.0 V dc Input voltage (VIN) +5.5 V dc Maximum power dissipation (PD): 1/ Case P .1050 mW Case 2 13
9、75 mW Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds): Case P .+300C Case temperature (soldering, 60 seconds): Case 2 +260C Junction temperature (TJ) +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case P
10、 .125C/W Case 2 150C/W 1/ For case P, derate at 8.4mW/C above TA= +25C. For case 2, derate at 11.0 mW/C above TA= +25C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77049 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS
11、, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH) . 2.0 V dc Ambient operating temperature range (TA) . -55C to +125C
12、 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract
13、. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS
14、 MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building
15、4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption
16、 has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certif
17、ied and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented
18、in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q” or “QML” certification mark in accordance with MIL-PRF-38535 is re
19、quired to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.
20、2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in
21、table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or
22、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77049 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise
23、 specified Group A subgroups Device type Limits Unit Min Max Input clamp voltage VICVCC= 4.5 V, IIN= -12 mA 1 All -1.5 V High level output current IOHVCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V, VOH= 30 V 1,2,3 All 300 A Low level output current IOLVCC= 4.5 V, VIH= 2 V, IOL= 100 mA 1,2,3 All 0.5 V VIL= 0.8 V
24、 IOL= 300 mA 0.8 Input current at maximum input voltage IINVCC= 5.5 V, VIN= 5.5 V 1,2,3 All 1.0 mA High level input current IIHVCC= 5.5 V, VIN= 2.4 V 1,2,3 All 60 A Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1,2,3 All -1.6 mA Supply current, outputs high ICCHVCC= 5.5 V VIN= 0 V 1,2,3 01 14 mA
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