DLA DESC-DWG-84087 REV J-2008 DELAY LINES 1 TO 5 TAPS 14-PIN DIP COMPATIBLE T2L INTERFACED《延迟线 1到5个搭接处 14针DIP兼容 T2L连接》.pdf
《DLA DESC-DWG-84087 REV J-2008 DELAY LINES 1 TO 5 TAPS 14-PIN DIP COMPATIBLE T2L INTERFACED《延迟线 1到5个搭接处 14针DIP兼容 T2L连接》.pdf》由会员分享,可在线阅读,更多相关《DLA DESC-DWG-84087 REV J-2008 DELAY LINES 1 TO 5 TAPS 14-PIN DIP COMPATIBLE T2L INTERFACED《延迟线 1到5个搭接处 14针DIP兼容 T2L连接》.pdf(15页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Added a second source for dash numbers 37 through 61. 10 Apr 1985 I.R. Jones B Added dash numbers 62 through 66. 02 May 1985 I.R. Jones C Added dash numbers 67 through 77. Editorial changes. 06 Aug 1987 Randy Larson D Replaced MIL-D-23859 references with MI
2、L-PRF-83532. Changed pin length dimensions. Added note 4 to figure 1. Added three vendors. Editorial changes throughout. J.W. 07 Oct 1988 Randy Larson E Changed thermal shock requirements. Added two vendors. Editorial changes throughout. B.B. 29 Aug 1989 D.E. Morgan F Changed tolerance on .300 dimen
3、sion between lead rows (figure 1, all configurations). Added one vendor. Added “Inactive“ notice to page 1. Editorial changes throughout. J.W. 11 Sep 1990 Randy Larson G Changed paragraphs 3.6 and 3.8.1. Editorial changes throughout. J.W. 26 Aug1991 R. Gosciniak H Changes in accordance with NOR 5999
4、-R001-92 09 Sep 1992 D. Moore J Editorial changes made throughout. 18 Sep 2008 Michael A. Radecki Prepared in accordance with ASME Y14.100 Source control drawing REV J J J J J J J J J J J J J J J REV STATUS OF PAGES PAGES 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PMIC N/A PREPARED BY Christopher A. Rauch
5、DESIGN ACTIVITY DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OH 45444-5000 CHECKED BY Randy Larson APPROVED BY Ivan R. Jones TITLE DELAY LINES, 1 TO 5 TAPS, 14-PIN DIP COMPATIBLE, T2L INTERFACED SIZE A CODE IDENT. NO. 14933 DWG NO. 84087 Original date of drawing 84-09-04 REV J PAGE 1 OF 15 AMSC N/A 599
6、9-E217INACTIVE FOR NEW DESIGN Delay lines contained herein which have qualified MIL-PRF-83532 sources are inactive for new design effective on the date of Revision F. Delay lines not covered by MIL-PRF-83532 may continue to be procured to this drawing. CURRENT DESIGN ACTIVITY CAGE CODE 037Z3 DEFENSE
7、 LOGISTICS AGENCY DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-CODE IDENT NO. 14933 DWG NO. 84087 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO SIZE A REV J SHEET 2 1. SCOPE 1.1 Scope. This
8、 drawing describes the requirements for a family of delay lines, 1 to 5 taps, 14-pin DIP compatible. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 84087 -01 Drawing number Dash number (See table I) 2. APPLICABLE DOCUMENTS 2.1 General. The document
9、s listed in this section are specified in sections 3 and 4 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list,
10、document users are cautioned that they must meet all specified requirements of documents in sections 3 and 4 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
11、part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-DTL-31000 - Technical Data Packages. MIL-DTL-19491 - Semiconductor Device, Packaging of. MIL-PRF-8
12、3532 - Delay Lines, Active, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-202 - Electronic and Electrical Component Parts. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil/ or from the Standardization Document
13、Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
14、AMERICAN SOCIETY FOR TESTING AND MATERIALS INTERNATIONAL (ASTM) ASTM-B339 - Pig Tin. ASTM-B545 - Electrodeposited Coatings of Tin. (Copies of this document are available on www.astm.org or from American Society for Testing and Materials International (ASTM), 100 Barr Harbor Drive, P. O. Box C700, We
15、st Conshohocken, PA, 19428-2959.) 2.4 Order of precedence. In the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exempti
16、on has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-CODE IDENT NO. 14933 DWG NO. 84087 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO SIZE A REV J SHEET 3 3. REQUIREMENTS 3.1 Interpretation. This drawing shall be interpreted in acco
17、rdance with MIL-DTL-31000. 3.2 Case material. Case material shall be in accordance with MIL-PRF-83532. 3.3 Dimensions and configurations. See figure 1. 3.4 Terminal material. Terminal material shall be copper, nickel, or alloy 42, tin plated in accordance with ASTM-B339 or ASTM-B545. 3.5 Temperature
18、 coefficient of delay (dash numbers -01 through -36 only). 2 ns + 500 ppm/C maximum at output. 3.6 Delay times. See table I. 3.7 Delay tolerance. 2 ns or 5 percent, whichever is greater. 3.7.1 Delay variance (dash numbers -37 through -77 only). Delay variance shall be 2 ns or 2 percent, whichever is
19、 greater, over the temperature range of -55C to +125C at 5 V dc (supply voltage) 10 percent. 3.8 Rise time. Rise time at any tap shall be 4 ns maximum. 3.9 Pulse width. Minimum operating pulse width shall be 20 percent of total delay time and maximum operating duty cycle is 50 percent. 3.10 Supply v
20、oltage (VCC). 4.5 V dc to 5.5 V dc. 3.11 Logic 1 input current. 50 A maximum. 3.12 Logic 0 input current. -2 mA maximum. 3.13 Logic 1, VOUT. 2.5 V minimum. 3.14 Logic 0, VOUT. 0.5 V maximum. 3.15 Logic 1 fan-out. 20/tap maximum (1 tap is capable of driving 20 TTL inputs). 3.16 Logic 0 fan-out. 10/ta
21、p maximum (1 tap is capable of driving 10 TTL inputs). 3.17 Power dissipation. 385 mW maximum at any tap. 3.18 Thermal shock. Method 107, MIL-STD-202, test condition B-1, 15 minutes at temperature extremes. Five minutes at +25C following each extreme condition. 3.19 Sealing. As specified in MIL-PRF-
22、83532. 3.20 Terminal strength. MIL-STD-202, method 211, test condition C and in accordance with MIL-PRF-83532. 3.21 Vibration. MIL-STD-202, method 204, test condition B and in accordance with MIL-PRF-83532. 3.22 Shock. MIL-STD-202, method 213, test condition D and in accordance with MIL-PRF-83532. 3
23、.23 Immersion. MIL-STD-202, method 104, test condition A and in accordance with MIL-PRF-83532. 3.24 Moisture resistance. As specified in MIL-PRF-83532. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-CODE IDENT NO. 14933 DWG NO. 84087 DEFENSE ELECTRO
24、NICS SUPPLY CENTER DAYTON, OHIO SIZE A REV J SHEET 4 3.25 Solderability. As specified in MIL-PRF-83532. 3.26 Resistance to solvents. As specified in MIL-PRF-83532. 3.27 Operating temperature range. -55C to +125C. 3.28 Storage temperature. -65C to +130C. 3.29 Recycled, recovered, or environmentally p
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