BS IEC 60748-23-4-2002 Semiconductor devices - Integrated circuits - Hybrid integrated circuits and film structures - Manufacturing line certification - Blank detail specification《.pdf

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1、BRITISH STANDARD BS IEC 60748-23-4: 2002 Semiconductor devices Integrated circuits Part 23-4: Hybrid integrated circuits and film structures Manufacturing line certification Blank detail specification ICS 31.200 NO COPYING WITHOUT BSI PERMISSION EXCEPT AS PERMITTED BY COPYRIGHT LAWBS IEC 60748-23-4:

2、2002 This British Standard, having been prepared under the direction of the Electrotechnical Sector Policy and Strategy Committee, was published under the authority of the Standards Policy and Strategy Committee on 18 June 2002 BSI 18 June 2002 ISBN 0 580 39833 1 National foreword This British Stand

3、ard reproduces verbatim IEC 60748-23-4:2002 and implements it as the UK national standard. The UK participation in its preparation was entrusted by Technical Committee EPL/47, Semiconductors, to Subcommittee EPL/47/1, Film and hybrid integrated circuits, which has the responsibility to: A list of or

4、ganizations represented on this subcommittee can be obtained on request to its secretary. From 1 January 1997, all IEC publications have the number 60000 added to the old number. For instance, IEC 27 has been renumbered as IEC 60027-1. For a period of time during the change over from one numbering s

5、ystem to the other, publications may contain identifiers from both systems. Cross-references The British Standards which implement international or European publications referred to in this document may be found in the BSI Catalogue under the section entitled “International Standards Correspondence

6、Index”, or by using the “Search” facility of the BSI Electronic Catalogue or of British Standards Online. A publication does not purport to include all the necessary provisions of a contract. Users of this publication are responsible for their correct application. Compliance with a British Standard

7、does not of itself confer immunity from legal obligations. aid enquirers to understand the text; present to the responsible international/European committee any enquiries on the interpretation, or proposals for change, and keep the UK interests informed; monitor related international and European de

8、velopments and promulgate them in the UK. Summary of pages This document comprises a front cover, an inside front cover, the IEC title page, pages 2 to 19 and a back cover The BSI copyright date displayed in this document indicates when the document was last issued. Amendments issued since publicati

9、on Amd. No. Date CommentsINTERNATIONAL STANDARD IEC 60748-23-4 QC 165000-4 First edition 2002-05 Semiconductor devices Integrated circuits Part 23-4: Hybrid integrated circuits and film structures Manufacturing line certification Blank detail specification Dispositifs semiconducteurs Circuits intgrs

10、 Partie 23-4: Circuits intgrs hybrides et structures par films Certification de la ligne de fabrication Spcification particulire cadre Reference number IEC 60748-23-4:2002(E) 2 607-8423-4 CEI:0220(E) INTERNATIONAL ELECTROTECHNICAL COMMISSION _ SEMICONDUCTOR DEVICES INTEGRATED CIRCUITS Part 23-4: Hyb

11、rid integrated circuits and film structures Manufacturing line certification Blank detail specification FOREWORD 1) The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The o

12、bject of the IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, the IEC publishes International Standards. Their preparation is entrusted to technical committees; any IEC N

13、ational Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. The IEC collaborates closely with the International Organization for Standardiza

14、tion (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has repr

15、esentation from all interested National Committees. 3) The documents produced have the form of recommendations for international use and are published in the form of standards, technical specifications, technical reports or guides and they are accepted by the National Committees in that sense. 4) In

16、 order to promote international unification, IEC National Committees undertake to apply IEC International Standards transparently to the maximum extent possible in their national and regional standards. Any divergence between the IEC Standard and the corresponding national or regional standard shall

17、 be clearly indicated in the latter. 5) The IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any equipment declared to be in conformity with one of its standards. 6) Attention is drawn to the possibility that some of the elements of this International

18、 Standard may be the subject of patent rights. The IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60748-23-4 has been prepared by subcommittee 47A: Integrated circuits, of IEC technical committee 47: Semiconductor devices. The text of this

19、 standard is based on the European standard EN 165000-4 and the following documents: FDIS Report on voting 47A/641/FDIS 47A/652/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. IEC 60748-23-4 should be read in con

20、junction with Parts 23-1, 23-2 and 23-3. The QC number that appears on the front cover of this publication is the specification number in the IEC Quality Assessment System for Electronic Components (IECQ). BSIEC60748234:2002 BSI18June2002 2067-8423-4 CEI:0220(E) 3 The committee has decided that the

21、contents of this publication will remain unchanged until 2006. At this date, the publication will be reconfirmed; withdrawn; replaced by a revised edition, or amended. BSIEC60748234:2002 BSI18June2002 3 4 607-8423-4 CEI:0220(E) SEMICONDUCTOR DEVICES INTEGRATED CIRCUITS Part 23-4: Hybrid integrated c

22、ircuits and film structures Manufacturing line certification Blank detail specification 1 General 1.1 Scope This part of IEC 60748 serves as a Blank Detail Specification (BDS) for a high quality approval system and contains requirements for style and layout and minimum content of detail specificatio

23、ns. These requirements are applicable when the detail specification is published (e.g. for standard product). 1.2 Normative references The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated referenc

24、es, the latest edition of the referenced document (including any amendments) applies. IEC 60748-23-1:2002, Semiconductor devices Integrated circuits Part 23-1: Hybrid integrated circuits and film structures Manufacturing line certification Generic specification IEC 60748-23-2:2002, Semiconductor dev

25、ices Integrated circuits Part 23-2: Hybrid integrated circuits and film structures Manufacturing line certification Internal visual inspection and special tests IEC 60748-23-3:2002, Semiconductor devices Integrated circuits Part 23-3: Hybrid integrated circuits and film structures Manufacturing line

26、 certification Manufacturers self audit check list and report 2 Guidance for preparation of a detail specification The front page layout is illustrated. When the detail specifications for customer circuits are not published, the layout requirements of the blank detail specification are optional. A s

27、uggested front page layout is also illustrated. An example of a Customer Detail Specification (CDS) is also given. The numbers between square brackets on the front page of the blank detail specification illustrated correspond to the following indications which should be given: 1 The name of the Nati

28、onal Standards Organization under whose authority the detail specification is published and, if applicable, the organization from whom the detail specification is available. 2 The IECQ number of the detail specification. 3 The number and issue number of the IEC generic or sectional specification as

29、relevant; also national reference if different. 4 If different from the IEC number, the national number of the detail specification, date of issue and any further information required by the national system, together with any amendment numbers. BSIEC60748234:2002 BSI18June2002 4067-8423-4 CEI:0220(E

30、) 5 5 A brief description of the technology and the type or function of the hybrid circuit. 6 Information on typical construction (where applicable). 7 An outline drawing with main dimensions which are of importance for interchangeability and/or reference to the appropriate national or international

31、 document for outlines. Alternatively, this drawing may be given in an annex to the detail specification. 8 The product assessment level schedule number covered by the detail specification. 9 Reference data giving information on the most important properties of the circuit which allow comparison bet

32、ween the various circuit types intended for the same, or for similar applications. BSIEC60748234:2002 BSI18June2002 5 6 607-8423-4 CEI:0220(E) Layout of Blank Detail Specification (BDS) FRONT PAGE FOR STANDARD CATALOGUE CIRCUITS Specification available from: 1 IEC 60748-23 2 Page 1 of Electronic com

33、ponents of assessed 2 quality by Manufacturing Line Certification Approval in accordance with 4 Outline and dimensions (see table 1) 7 (first angle projection): Thick/thin film 5 hybrid integrated circuit Encapsulation 6 (see note 2)Dimensions in millimetres (see note 1) Product assessment 8 level N

34、o. NOTE 1 The non-dimensioned details do not affect the performance of the devices. NOTE 2 State whether the terminations are (not) suitable for soldering. State whether the terminations are (not) suitable for printed wiring applications. Information about manufacturers who have components qualified

35、 to this detail specification is available in the current Certified Manufacturing Line Listing. BSIEC60748234:2002 BSI18June2002 6067-8423-4 CEI:0220(E) 7 FRONT PAGE FOR CUSTOMER CIRCUITS Customer CDS No. Issue Date Page 1 of Manufacturer Electronic components of assessed 3 quality by Manufacturing

36、Line Certification Approval in accordance with: Type No. Outline and dimensions (see table 1) 7 (first angle projection): Thick/thin film 5 hybrid integrated circuit Encapsulation 6 (see note 2)Dimensions in millimetres (see note 1) Product assessment 8 level No. NOTE 1 The non-dimensioned details d

37、o not affect the performance of the devices. NOTE 2 State whether the terminations are (not) suitable for soldering. State whether the terminations are (not) suitable for printed wiring applications. BSIEC60748234:2002 BSI18June2002 7 8 607-8423-4 CEI:0220(E) 3 General data (BDS) 3.1 Recommended met

38、hods of mounting The detail specification shall prescribe the method of mounting to be applied for normal use and for the application of the vibration and the bump or shock tests. The design of the circuit may be such that special mounting fixtures are required in its use. In this case the detail sp

39、ecification shall describe the mounting fixtures and they shall be used in the application of the vibration and bump or shock tests. 3.2 Dimensions, characteristics and conditions of use Table 1 Reference data 9 Where a range of products has the same basic function and is made in the same tech- nolo

40、gy and envelope, this table will be used to detail the differences in characteristics. The detail specification shall contain all information needed to describe adequately: 3.2.1 Performance and design of the circuit (1) schematic circuit diagram; (2) resistance and capacitance values, tolerances, m

41、atching, tracking, power dissipation, tem- perature coefficients of resistors/temperature coefficients of capacitors where applicable; (3) limitations on resistance of conductors where applicable; (4) test circuit or method and performance limits; (5) added components (see 6.1.3 of IEC 60748-23-1).

42、3.2.2 Limiting conditions of use Examples: operating temperature range; storage temperature range; vibration, shock, bump severities; climatic category; maximum voltage. NOTE Any interrelationship between the details specified in 1.2.1 and 1.2.2 should be stated. 3.2.3 Derating Where applicable, a d

43、erating curve is to be included in this clause. 3.3 Related documents A list of related documents and issue/date status should be given in this clause. 3.4 Marking The marking of the circuit and primary package shall be in accordance with the requirements of clause 5 of IEC 60748-23-1. The details o

44、f the marking of the circuit and primary package shall be given in full. BSIEC60748234:2002 BSI18June2002 8067-8423-4 CEI:0220(E) 9 3.5 Ordering information Orders for circuits covered by this specification shall contain the following information: 1) quantity; 2) number of the detail specification w

45、ith style reference and product assessment level number; 3) function of the circuit, if appropriate; 4) basic functional characteristics with tolerance, if appropriate. 3.6 Additional information (not for inspection purposes) The detail specification may include information (which is not normally re

46、quired to be verified by the inspection procedure) such as circuit diagrams, curves, drawings and notes for the clarification of the detail specification. 3.7 Additional or increased severities or requirements to those specified in the product assessment level schedule These requirements may be spec

47、ified in section two of the detail specification, but do not modify the release level. 4 Inspection requirements (BDS) The detail specification shall prescribe the testing requirements of the initial delivery lot. This shall consist of all tests contained in the product assessment level schedule to

48、which release is required, with the exception of those tests for which structural similarity may be invoked. The tests shall be subdivided into device screening (100 %), device sample testing, design evaluation and additional tests or requirements (see 1.7). Full details shall be given of test condi

49、tion, pin-outs, mounting methods, etc. The detail specification shall also prescribe the testing requirements of subsequent delivery lots. These shall consist of the screening tests, device sampling and such of the design evaluation tests as may be agreed between the manufacturer and the customer. For those design eva