ANSI INCITS 222-1997 Information Technology - High-Performance Parallel Interface - Physical Switch Control (HIPPI-SC).pdf

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1、ANSI INCITS 222-1997 (R2002)(formerly ANSI X3.222-1997)for Information Technology High-Performance Parallel Interface Physical Switch Control (HIPPI-SC)AmericanNationalStandardApproval of an American National Standard requires review by ANSI that therequirements for due process, consensus, and other

2、 criteria for approval havebeen met by the standards developer.Consensus is established when, in the judgment of the ANSI Board of StandardsReview, substantial agreement has been reached by directly and materiallyaffected interests. Substantial agreement means much more than a simplemajority, but no

3、t necessarily unanimity. Consensus requires that all views andobjections be considered, and that a concerted effort be made toward theirresolution.The use of American National Standards is completely voluntary; their existencedoes not in any respect preclude anyone, whether he has approved the stand

4、ardsor not, from manufacturing, marketing, purchasing, or using products, processes,or procedures not conforming to the standards.The American National Standards Institute does not develop standards and will inno circumstances give an interpretation of any American National Standard.Moreover, no per

5、son shall have the right or authority to issue an interpretation ofan American National Standard in the name of the American National StandardsInstitute. Requests for interpretations should be addressed to the secretariat orsponsor whose name appears on the title page of this standard.CAUTION NOTICE

6、: This American National Standard may be revised orwithdrawn at any time. The procedures of the American National StandardsInstitute require that action be taken periodically to reaffirm, revise, or withdrawthis standard. Purchasers of American National Standards may receive currentinformation on al

7、l standards by calling or writing the American National StandardsInstitute.CAUTION: The developers of this standard have requested that holders of patents that may be required for theimplementation of the standard disclose such patents to the publisher. However, neither the developers nor the publis

8、herhave undertaken a patent search in order to identify which, if any, patents may apply to this standard. As of the date ofpublication of this standard and following calls for the identification of patents that may be required for the implementationof the standard, no such claims have been made. No

9、 further patent search is conducted by the developer or publisher inrespect to any standard it processes. No representation is made or implied that licenses are not required to avoidinfringement in the use of this standard.Published byAmerican National Standards Institute11 West 42nd Street, New Yor

10、k, New York 10036Copyright 1997 by Information Technology Industry Council (ITI)All rights reserved.No part of this publication may be reproduced in anyform, in an electronic retrieval system or otherwise,without prior written permission of ITI, 1250 Eye Street NW,Washington, DC 20005.Printed in the

11、 United States of AmericaANSI X3.222-l 997 Revision of ANSI X3.222-1993 American National Standard for Information Technology - High-Performance Parallel Interface - Physical Switch Control (HIPPI-SC) c Secretariat Information Technology Industry Council (ITI) .- Approved March 12, 1997 American Nat

12、ional Standards Institute, Inc. Abstract This revised standard provides a protocol for controlling physical layer switches that are based on the High-Performance Parallel Interface, a simple high-performance point-to-point interface for transmitting digital data at peak data rates of 800 or 1600 Mbi

13、t/s between data-processing equip- ment. Contents Page . . . Foreword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . III Introduction . . . . . . . . . .

14、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi 1 2 3 3.1 3.2 4 4.1 4.2 4.3 4.4 5 -5.1 5.2 5.3 5.4 5.5 Scope 1 Normative references . 1 Definitions and conventions 1 Definitions

15、1 Editorial conventions 2 CCI and I-Field formats 2 Format .2 Source routing . .2 Logical address 4 Reserved Logical Addresses . .4 Switch behavior 4 Use of INTERCONNECT signals . 4 CLOCK signal 5 Connection request successful .5 Breaking a connection . .5 Connection request unsuccessful 5 Figures “

16、i CCI and I-Field format . .3 2 I-Field with source routing, D = 0, and 16 by 16 switch . .3 3 I-Field with source routing, D = 1, and 32 by 32 switch . .3 4 I-Field with logical addressing and D = 0 . 3 5 I-Field with logical addressing and D = 1 .3 Annexes A A.1 A.2 A.3 A.4 B B.l 8.2 8.3 8.4 C Rou

17、ting with the CCI and I-Field . 6 General example . .6 Source routing 6 Using a logical address 7 Connections between fabrics 9 Implementation considerations 10 Special considerations for Camp-on 10 Interpretation of the W bit and INTERCONNECT signals .10 Logical address self-discovery by a host con

18、nected to a HIPPI-SC switch . 10 CONNECT and READY signals .13 Bibliography . 14 Foreword (This foreword is not part of American National Standard X3.222-1997.) This High-Performance Parallel Interface, Physical Switch Control (HIPPI- SC) standard defines the control for HIPPI physical layer switche

19、s. HIPPI is an efficient simplex high-performance point-to-point interface. HIPPI physical layer switches may be used to give the equivalent of multi-drop capability, connecting together multiple data processing equipments. The HIPPI is designed for transmitting data at peak rates of 800 or 1600 Mbi

20、t/s between data processing equipment. This document includes three annexes which are informative and are not considered part of the standard. This standard was developed by Task Group X3T9.3 of Accredited Standards Committee X3 during 1990 and 1991. The standards approval process started in 1991. X

21、3T9.3 was reconstituted as X3Tll in 1993. Requests for interpretation, suggestions for improvement or addenda, or defect reports are welcome. They should be sent to National Committee for Information Technology Standards (NCITS), ITI, 1250 Eye Street, NW, Suite 200, Washington, DC 20005. This standa

22、rd was processed and approved for submittal to ANSI by NCITS. Committee approval of this standard does not necessarily imply that all committee members voted for its approval. At the time it approved this standard, NCITS had the following members: James D. Converse, Chair Karen Higginbottom, Vice-Ch

23、air Kate McMillan, Secretary Organization Represented Name of Representative AMP, Inc. Ben Bennett Edward Kelly (Alt.) Apple Computer, Inc David K. Michael Jerry Kellenbenz (Ah.) AT - I-Fields and CCls can span multiple physical layer switches within a fabric; - When a Destination end-point receives

24、 a packet, it can easily manipu- late the I-Field received to return a reply packet to the Source; - Support for physical layer switches with differing numbers of ports, all within the same fabric; - Specified reserved addresses to aid address self-discovery, switch * management, and switch control.

25、 - - vi AMERICAN NATIONAL STANDARD ANSI X3.222-l 997 American National Standard for Information Technology - High-Performance Parallel Interface - Physical Switch Control (HIPPI-SC) 1 scope This American National Standard provides switch control for physical layer switches using the High-Performance

26、 Parallel Interface (HIPPI). a high-performance point-to- point interface between data-processing equipment. This standard does not protect against errors introduced by intermediate devices interconnecting multiple HIPPI-PHs. The purpose of this standard is to facilitate the development and use of t

27、he HIPPI in computer systems by protiding common physical switch control. The stan- dard provides switch control structures for physical layer switches interconnecting computers, high-performance display systems, and high-performance, intelligent block- transfer peripherals. This standard also appli

28、es to point- to-point HIPPI topologies. 2 N the switch shall connect through Cable-A. W = 1 designates that the Source is using the 1600 Mbit/s data rate option (DATA BUS is 64 bits wide): the switch shall connect through both Cable-A and Cable-B. NOTE 2 - The W bit is used in conjunction with the I

29、NTERCONNECT signals on Cable-A and Cable-B. The INTERCONNECT sianals. as defined in HIPPI-PH. tell a switch or end-joint t i.e., powered on and enabled for HIPPI connections. Each switch input and output port shall monitor the received INTERCONNECT signal and shall use this signal to validate all ot

30、her HIPPI control signals. 4 ANSI X3.222-l 997 NOTE - A switch port may deassert the INTERCONNECT signal when that port is disabled for maintenance or diagnostics. 5.2 CLOCK signal The HIPPI CLOCK signal generated by the switch output port (a HIPPI Source) shall be continuous and shall conform to.th

31、e HIPPI-PH specification at all times. 5.3 Connection request successful Once a connection is completed the switch shall be transparent, with the exception of switch induced latency, to the HIPPI signal sequences. NOTE - The switch acts as a repeater under the constraints imposed by 7.9 of ANSI X3.1

32、83, and can change the number of idle words between bursts or packets. 5.4 Bre:king a connection Either the Source end-point or the Destination end-point may break a connection. 5.4.1 Source deasserts REQUEST When the Source end-point deasserts the REQUEST signal, the switch shall break the connecti

33、on. The switch shall not wait for the Destination end-point to deassert the CONNECT signal to break the connection. The Source end-point will see the CONNECT signal go false regardless of Destination end-point actions. NOTE - This immediate disconnection frees the associated input port for the next

34、connection-request. This maximizes the efficiency of the HIPPI attachment by allowing the Source end-Point to make a new connection without waiting for the propagation delay and the Destination end-point disconnect turn-around time. 5.4.2 Destination deasserts CONNECT When the Destination end-point

35、deasserts the CONNECT signal, the connection through the switch shall be broken. The switch shall not wait for the Source end-point to deassert the REQUEST signal to break the connection. The Destination end-point will see the REQUEST signal go false regardless of Source end-point actions. 54.3 INTE

36、RCONNECT false If the INTERCONNECT signal, received by either the switch input port or the switch output port, goes false during any stage of a connection then the connection through the switch shall be broken. 5.5 Connection request unsuccessful Connection requests can be unsuccessful due to: - Una

37、vailable Destination end-points. - Unavailable fabric resources. - Errors. 5.5.1 Down-stream connection reject A rejected connection sequence can be initiated by either a down-stream switch or the Destination end-point. A rejected connection sequence shall be propagated through the switch without ch

38、ange. When the switch detects the CONNECT signal is false, at the end of the sequence, the connection through the switch shall be broken. 5.5.2 Switch-generated connection reject The switch input port logic shall initiate a rejected connection sequence to the Source end-point, and shall not complete

39、 the connection through the switch, in the following situations: - When the selected output port(s), or Destination end- point, does not exist or is unavailable. For example, when the INTERCONNECT signal received by the selected output port is false. - When the selected output port(s) is(are) busy,

40、i.e., connected to some other port, and Camp-on = 0. - When a data parity error is detected on the I-Field while connecting through this switch. The switch is not obligated to check the I-Field parity after the REQUEST signal has been propagated through the switch. - When the I-Field Path Selection

41、(bits 26,25) specifies an addressing mode not supported or disabled. - When the I-Field Path Selection (bits 26,25) specifies logical addressing, and the Destination logical address is not mapped to any physical output port. - When the I-Field Double-wide (bit 26) selection conflicts with the switch

42、 capabilities or the end-point capabilities. Clause 8.2 discusses such conflicts. - When the I-Field Locally Administered (bit 31) selection is not supported by the switch. 5.5.3 Connection request contention When two or more input ports vie for the same output port only one input port can “win”. Th

43、e winner shall be connected through the switch. The loser(s) shall either wait for the output port to become available (i.e., Camp-on = l), or the input port(s) shall generate a rejected connection sequence (i.e., Camp-on = 0). 5 ANSI X3.222-l 997 Annex A (informative) Routing with the CCI and I-Fie

44、ld A.1 General example The Ccl and I-Field are use to control HIPPI physical layer switches, supporting the interconnection of many HIPPI devices. Figure A.1 is an example of a small general con- figuration that will be used to describe the operation of the CCI and I-Field as specified in clause 4.

45、Three hosts, A, B, and C, are shown, but there will probably be many more hosts connected in an actual configuration. The switching fabric is the interconnection mechanism, in this example the four switches and the interconnecting HIPPI links. Switch 1 Switch 2 Switch 3 Figure A.1 .- Physical layer

46、switch example Two types of operation are specified: (1) source routing, and (2) logical address. The direction of interpretation of the Routing Control field is also under user control, allowing a Destination end-point to return a reply by simply using the same I-Field that was received with the di

47、rection bit complemented. A2 Source routing With source routing, the Source end-point specifies the action of each switch on the way to the Destination. For example, to go from host-A to host-B, host-A could specify 2,6,9. This would result in switch-l selecting output port-2, switch-2 selecting out

48、put port-6, and switch-3 selecting output port-g. Alternatively, host-A could have specified 7.5.9 to go through switch-4 instead of switch-2. For connection or packet routing, this involves an end- point (the “originator” or Source”) having to know the physical route to a particular Destination bef

49、ore a connec- tion can be established. When using multiple switches (where the switches have no intelligence with regards to network routing), the Source has to establish the entire physical route for a given connection. .Source routing can often facilitate low latency connections because the switches have no burden of decision making during the connection process. However, source routing can be unattractive for a configuration with the following features: (1) large and/or dynamic configuration (the hosts must keep track of the interconnection configuration), (2) “blocking” configuration