IEC 60191-6-22-2012 Mechanical standardization of semiconductor devices - Part 6-22 General rules for the preparation of outline drawings of surface mounted semiconductor device pa.pdf

《IEC 60191-6-22-2012 Mechanical standardization of semiconductor devices - Part 6-22 General rules for the preparation of outline drawings of surface mounted semiconductor device pa.pdf》由会员分享，可在线阅读，更多相关《IEC 60191-6-22-2012 Mechanical standardization of semiconductor devices - Part 6-22 General rules for the preparation of outline drawings of surface mounted semiconductor device pa.pdf（38页珍藏版）》请在麦多课文档分享上搜索。

1、 IEC 60191-6-22 Edition 1.0 2012-12 INTERNATIONAL STANDARD NORME INTERNATIONALE Mechanical standardization of semiconductor devices Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for semiconductor packages Silicon Fine-p

2、itch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) Normalisation mcanique des dispositifs semiconducteurs Partie 6-22: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs montage en surface Guide de conception pour les botiers matri

3、ciels billes et pas fins en silicium et botiers matriciels zone de contact plate et pas fins en silicium (S-FBGA et S-FLGA) IEC 60191-6-22:2012 THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2012 IEC, Geneva, Switzerland All rights reserved. Unless otherwise specified, no part of this publication

4、 may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either IEC or IECs member National Committee in the country of the requester. If you have any questions about IEC copyright or have an enquir

5、y about obtaining additional rights to this publication, please contact the address below or your local IEC member National Committee for further information. Droits de reproduction rservs. Sauf indication contraire, aucune partie de cette publication ne peut tre reproduite ni utilise sous quelque f

6、orme que ce soit et par aucun procd, lectronique ou mcanique, y compris la photocopie et les microfilms, sans laccord crit de la CEI ou du Comit national de la CEI du pays du demandeur. Si vous avez des questions sur le copyright de la CEI ou si vous dsirez obtenir des droits supplmentaires sur cett

7、e publication, utilisez les coordonnes ci-aprs ou contactez le Comit national de la CEI de votre pays de rsidence. IEC Central Office Tel.: +41 22 919 02 11 3, rue de Varemb Fax: +41 22 919 03 00 CH-1211 Geneva 20 infoiec.ch Switzerland www.iec.ch About the IEC The International Electrotechnical Com

8、mission (IEC) is the leading global organization that prepares and publishes International Standards for all electrical, electronic and related technologies. About IEC publications The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the

9、latest edition, a corrigenda or an amendment might have been published. Useful links: IEC publications search - www.iec.ch/searchpub The advanced search enables you to find IEC publications by a variety of criteria (reference number, text, technical committee,). It also gives information on projects

10、, replaced and withdrawn publications. IEC Just Published - webstore.iec.ch/justpublished Stay up to date on all new IEC publications. Just Published details all new publications released. Available on-line and also once a month by email. Electropedia - www.electropedia.org The worlds leading online

11、 dictionary of electronic and electrical terms containing more than 30 000 terms and definitions in English and French, with equivalent terms in additional languages. Also known as the International Electrotechnical Vocabulary (IEV) on-line. Customer Service Centre - webstore.iec.ch/csc If you wish

12、to give us your feedback on this publication or need further assistance, please contact the Customer Service Centre: csciec.ch. A propos de la CEI La Commission Electrotechnique Internationale (CEI) est la premire organisation mondiale qui labore et publie des Normes internationales pour tout ce qui

13、 a trait llectricit, llectronique et aux technologies apparentes. A propos des publications CEI Le contenu technique des publications de la CEI est constamment revu. Veuillez vous assurer que vous possdez ldition la plus rcente, un corrigendum ou amendement peut avoir t publi. Liens utiles: Recherch

14、e de publications CEI - www.iec.ch/searchpub La recherche avance vous permet de trouver des publications CEI en utilisant diffrents critres (numro de rfrence, texte, comit dtudes,). Elle donne aussi des informations sur les projets et les publications remplaces ou retires. Just Published CEI - webst

15、ore.iec.ch/justpublished Restez inform sur les nouvelles publications de la CEI. Just Published dtaille les nouvelles publications parues. Disponible en ligne et aussi une fois par mois par email. Electropedia - www.electropedia.org Le premier dictionnaire en ligne au monde de termes lectroniques et

16、 lectriques. Il contient plus de 30 000 termes et dfinitions en anglais et en franais, ainsi que les termes quivalents dans les langues additionnelles. Egalement appel Vocabulaire Electrotechnique International (VEI) en ligne. Service Clients - webstore.iec.ch/csc Si vous dsirez nous donner des comm

17、entaires sur cette publication ou si vous avez des questions contactez-nous: csciec.ch. IEC 60191-6-22 Edition 1.0 2012-12 INTERNATIONAL STANDARD NORME INTERNATIONALE Mechanical standardization of semiconductor devices Part 6-22: General rules for the preparation of outline drawings of surface mount

18、ed semiconductor device packages Design guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) Normalisation mcanique des dispositifs semiconducteurs Partie 6-22: Rgles gnrales pour la prparation des dessins dencombrement des di

19、spositifs semiconducteurs montage en surface Guide de conception pour les botiers matriciels billes et pas fins en silicium et botiers matriciels zone de contact plate et pas fins en silicium (S-FBGA et S-FLGA) INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE Q IC

20、S 31.080.01 PRICE CODE CODE PRIX ISBN 978-2-83220-526-6 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electrotechnique Internationale Warning! Make sure that you obtained this publication from an authorized distributor. Attention! Veuillez vous a

21、ssurer que vous avez obtenu cette publication via un distributeur agr. 2 60191-6-22 IEC:2012 CONTENTS FOREWORD . 3 1 Scope . 5 2 Normative references . 5 3 Terms and definitions . 5 4 Terminal position numbering . 5 5 Code of package nominal dimensions . 5 6 Symbols and drawings 6 7 Dimensions 9 7.1

22、 Group 1 . 9 7.2 Group 2 . 11 8 Combination list of D, E, M D , and M E12 Bibliography 17 Figure 1 S-FBGA outline 6 Figure 2 S-FLGA outline 7 Figure 3 Mechanical gauge drawing e). 8 Figure 4 Array of terminal-existence areas f). 8 Table 1 Dimensions and tolerances in Group 1 9 Table 2 Dimensions and

23、 tolerances of Group 2 11 Table 3 e= 0,80 mm pitch S-FBGA and S-FLGA . 12 Table 4 e= 0,65 mm pitch S-FBGA and S-FLGA . 12 Table 5 e= 0,50 mm pitch S-FBGA and S-FLGA . 13 Table 6 e= 0,40 mm pitch S-FBGA and S-FLGA . 14 Table 7 e= 0,30 mm pitch S-FBGA and S-FLGA . 15 Table 8 e= 0,25 mm pitch S-FLGA .

24、16 60191-6-22 IEC:2012 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for semiconductor packages Silicon Fine-pitch Ball G

25、rid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote internat

26、ional co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter r

27、eferred to as “IEC Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non- governmental organizations liaising with the IEC also participat

28、e in this preparation. IEC collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an inte

29、rnational consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committees. 3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reaso

30、nable efforts are made to ensure that the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC

31、 Publications transparently to the maximum extent possible in their national and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC itself does not provide any attestation of confor

32、mity. Independent certification bodies provide conformity assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any services carried out by independent certification bodies. 6) All users should ensure that they have the latest edition of this publicati

33、on. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical committees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or f

34、or costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct

35、application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60191-6-22 has been prepared by

36、 subcommittee 47D: Semiconductor packaging, of IEC technical committee 47: Semiconductor devices. The text of this standard is based on the following documents: CDV Report on voting 47D/812/CDV 47D/820/RVC Full information on the voting for the approval of this standard can be found in the report on

37、 voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. 4 60191-6-22 IEC:2012 A list of all the parts in the IEC 60191 series, under the general title Mechanical standardization of semiconductor devices, can be found on the IEC websi

38、te. The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC web site under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a

39、revised edition, or amended. 60191-6-22 IEC:2012 5 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Sili

40、con Fine-pitch Land Grid Array (S-FBGA and S-FLGA) 1 Scope This part of IEC 60191 provides the outline drawings and dimensions common to silicon- based package structures and materials of ball grid array packages (BGA) and land grid array packages (LGA). 2 Normative references The following document

41、s, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. Void 3 Terms and definitions

42、For the purpose of this document, the following terms and definitions apply. 3.1 S-FBGA FBGA composed of silicon die, dielectric layer(s) on the die, rerouting wires from the die pads to outer balls on the dielectric layer(s), and outer balls with heights more than 0,1 mm 3.2 S-FLGA FLGA composed of

43、 silicon die, dielectric layer(s) on the die, rerouting wires from the die pads to outer lands on the dielectric layer(s), and outer lands with heights of 0,1 mm or less 4 Terminal position numbering When a package is viewed from the terminal side with the index corner in the bottom left corner posi

44、tion, terminal rows are lettered from bottom to top starting with A, then B, C, AA, AB, etc., whereas terminal columns are numbered from left to right starting with 1. Terminal positions are designated by a row-column grid system and shown as alphanumeric identification, e.g., A1, B1. The letters I,

45、 O, Q, S, X and Z shall not be used for naming the terminal rows. 5 Code of package nominal dimensions A code of package nominal dimensions is defined as the combination of package width E and length D which are shown in the second decimal place in millimeter. 6 60191-6-22 IEC:2012 6 Symbols and dra

46、wings Symbols and drawings are shown in Figures 1, 2, 3 and 4. a) B E A y 1S S A 1A e e y CZ (Z E ) (Z D ) n b d)Top view Side view Bottom view D D C B A 1 2 3 4 x 1M A M B M c)S S x 2M b) IEC 2310/12 Figure 1 S-FBGA outline 60191-6-22 IEC:2012 7 a) B E A y 1S S A 1A e e y CZ (Z E ) (Z D ) n b d)Top

47、 view Side view Bottom view D D C B A 1 2 3 4 x 1M A M B M c)S S x 2M b) IEC 2311/12 Figure 2 S-FLGA outline 8 60191-6-22 IEC:2012 e e e e b 3E maxD maxb 4IEC 2312/12 IEC 2313/12 Figure 3 Mechanical gauge drawing e)Figure 4 Array of terminal-existence areas f)Footnotes relating to Figures 1 to 4 a)

48、Datum S is the seating plane on which a package stays. b) The hatched zone is an index-marking area indicating A1 corner. c) True positional tolerances of terminals, x 1 and x 2, are applied to all terminals. d) The terminal diameter b is the maximum diameter of the ball as measured in a plane paral

49、lel to the seating plane. e) An array of terminal-existence areas with regard to the datum S , A , and B is shown in the mechanical gauge drawing in Figure 3. f) The array of terminal-existence areas with regard to the datum S is shown in Figure 4. 60191-6-22 IEC:2012 9 7 Dimensions 7.1 Group 1 Group 1 dimensions are shown in Table 1. Table 1 Dimens