ITU-T V 26 TER-1988 2400 BITS PER SECOND DUPLEX MODEM USING THE ECHO CANCELLATION TECHNIQUE STANDARDIZED FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON POINT-TO-POINT 2-W.pdf

《ITU-T V 26 TER-1988 2400 BITS PER SECOND DUPLEX MODEM USING THE ECHO CANCELLATION TECHNIQUE STANDARDIZED FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON POINT-TO-POINT 2-W.pdf》由会员分享，可在线阅读，更多相关《ITU-T V 26 TER-1988 2400 BITS PER SECOND DUPLEX MODEM USING THE ECHO CANCELLATION TECHNIQUE STANDARDIZED FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON POINT-TO-POINT 2-W.pdf（21页珍藏版）》请在麦多课文档分享上搜索。

1、INTERNATIONAL TELECOMMUNICATION UNION)45G134 6 G0TERTELECOMMUNICATIONSTANDARDIZATION SECTOROF ITU$!4!G0G0#/-5.)#!4)/./6%2G0G04(%G0G04%,%0(/.%G0G0.%47/2+G0G0“)43G0G00%2G0G03%#/.$G0G0$50,%8G0G0-/$%-53).G0G04(%G0G0%#(/G0G0#!.#%,!4)/.4%#(.)15%G0G034!.$!2$):%$G0G0 amended at Melbourne, 1988)The CCITT,con

2、sidering(a) that there is a demand for data transmission at 2400 bit/s in the duplex mode on the general switchedtelephone network (GSTN) and on point-to-point 2-wire leased telephone-type circuits;(b) that there will be a demand to have compatibility with higher data signalling rate duplex modems i

3、n thefall-back mode;(c) that in this case the echo cancellation technique (ECT) is foreseen,unanimously declaresthe view that the characteristics of the modems for this service shall provisionally be as follows:1 IntroductionThis modem is intended for use on connections on the GSTN and on point-to-p

4、oint 2-wire leased telephone-type circuits (see Note 1). Its principal characteristics are as follows:a) duplex mode of operation on the GSTN and point-to-point leased circuits,b) half-duplex mode of operation (optional) on the GSTN and point-to-point leased circuits (Note 2),c) channel separation b

5、y echo cancellation,d) differential phase-shift modulation for each channel with synchronous line transmission at 1200 baud(nominal),e) inclusion of a scrambler,f) inclusion of a compromise or adaptive equalizer,g) inclusion of test facilities,h) operation with data terminal equipment (DTE) in the f

6、ollowing modes:2400 bit/s synchronous,1200 bit/s synchronous (fall-back rate),2400 bit/s start stop (optional),1200 bit/s start stop (optional) (fall-back rate),i) inclusion of an operating sequence intended to allow interworking with 2-wire duplex 4800 bit/smodem (which modem is for further study).

7、2 Fascicle VIII.1 - Rec. V.26 terNote 1 - In certain countries the use of such a modem over the GSTN may not be allowed.Note 2 - When the optional half-duplex mode of operation is used, provisions in 7 shall supersede provisionsgiven elsewhere in this Recommendation.2 Line signals2.1 Carrier frequen

8、cyThe carrier frequency shall be 1800 1 Hz. No separate pilot tones are provided.2.2 Data line signal levelThe power levels used will conform to Recommendation V.2.2.3 EqualizerIf a fixed compromise equalizer is used, it shall be incorporated in the receiver. The characteristics of thisequalizer may

9、 be selected by Administrations.The possibility of producing compromise equalizer characteristics for international connections is for furtherstudy.If an adaptive equalizer is used, it shall be able to converge on data signals at 2400 bit/s without a trainingsequence.2.4 Spectrum and group-delay cha

10、racteristicsA 100% raised cosine amplitude spectrum shaping is equally divided between the receiver and transmitter. Theenergy density at 1200 Hz and 2400 Hz shall be attenuated 3.0 dB 2.0 dB with respect to the maximum energy densitybetween 1200 Hz and 2400 Hz.The group-delay of the transmit filter

11、s shall be within 100 microseconds over the frequency range1200-2400 Hz.2.5 Modulation2.5.1 Data signalling ratesThe data signalling rate transmitted to line shall be 2400 bit/s or 1200 bit/s 0.01% with a modulation rate of1200 baud 0.01%.2.5.2 Encoding of data bits2.5.2.1 2400 bits per secondAt 240

12、0 bit/s the data stream is divided into groups of two bits (dibits). Each dibit is encoded as a phase changerelative to the phase of the immediately preceding signal element (see Table 1/V.26 ter). At the receiver, the dibits aredecoded and reassembled in the correct order. The left-hand digit of th

13、e dibit is the one occurring first in the data streamas it enters the modulator portion of the modern after the scrambler.Fascicle VIII.1 - Rec. V.26 ter 3TABLE 1/V.26 terLine encoding at 2400 bit/sNote - The phase change is the actual on-line phase shift in thetransition region from the centre of o

14、ne signalling element to thecentre of the following signalling element.2.5.2.2 1200 bits per secondAt 1200 bit/s each bit shall be encoded as a phase change relative to the phase of the preceding signal element(see Table 2/V.26 ter).TABLE 2/V.26 terLine encoding at 1200 bit/sNote - The phase change

15、is the actual on-line phase shift in thetransition region from the centre of one signalling element to thecentre of the following signalling element.2.6 Received signal frequency toleranceThe receiver shall be able to operate with frequency offsets in the signal received from the other modem of upto

16、 7 Hz.2.7 Synchronizing signalsSynchronizing signals are used in the operating sequence and in the half-duplex mode (see 6.3 and 7). Thesynchronizing signals, for both data signalling rates, are divided into two segments as follows:2.7.1 The composition of segment 1 is continuous 180 phase reversals

17、 for 32 symbol intervals.2.7.2 Segment 2 is a pattern derived by scrambling binary ones with the scramblers defined in 5. The length of thepattern is 64 bits (32 symbol intervals) for 2400 bit/s and 64 bit/s (64 symbol intervals) for 1200 bit/s. The patterns aredefined in Table 3/V.26 ter. See also

18、Appendix I.Dibit values Phase change(see Note)00011110090180270Bit values Phase change(see Note)0101804 Fascicle VIII.1 - Rec. V.26 terTABLE 3/V.26 terData signallingrateSrambler(see 5)Segment 2 phase changes(in degrees)2400 bit/s GPC 0, 180, 180, 180, 180, 0, 0, 0, 0, 180, 180, 270, 90, 180,0, 0, 9

19、0, 180, 0 . . .2400 bit/s GPA 0, 180, 180, 180, 180, 0, 0, 0, 0, 180, 180, 270, 90, 180,0, 180, 180, 270, 0 . . .1200 bit/s GPC 0, 0, 180, 180, 180, 180, 180, 180, 180, 180, 0, 0, 0, 0,0, 0, 0, 0, 180, 180, 180, 180, 180, 0, 0, 180, 180, 180,0, 0, 0, 0, 0, 180, 180, 180 . . .1200 bit/s GPA 0, 0, 180

20、, 180, 180, 180, 180, 180, 180, 180, 0, 0, 0, 0,0, 0, 0, 0, 180, 180, 180, 180, 180, 0, 0, 180, 180, 180,0, 0, 180, 180, 180, 0, 180, 0 . . .3 Interchange circuits3.1 Essential and optional interchange circuitsThese are listed in Table 4/V.26 ter.TABLE 4/V.26 terInterchange circuit (see Note 1) Note

21、sNo. Designation102103Signal ground or common returnTransmitted data104105106Received dataRequest to sendReady for sending107108/1 or108/2109Data se readyConnect data set to lineData terminal readyData channel received line signal detector22111112113114115125140141142Data signalling rate selector (D

22、TE source)Data signalling rate selector (DCE source)Transmitter signal element timing (DTE source)Transmitter signal element timing (DCE source)Receiver signal element timing (DCE source)Calling indicatorLoopback/maintenance testLocal loopbackTest indicator34556Fascicle VIII.1 - Rec. V.26 ter 5Note

23、1 - All essential interchange circuits and any others which are provided shall comply with thefunctional and operational requirements of Recommendation V.24. All interchange circuits provided shallbe properly terminated in the data terminal equipment and in the data circuit-terminating equipment ina

24、ccordance with the appropriate Recommendation for electrical characteristics (see 3.5).Note 2 - This circuit shall be capable of operation as circuit 108/1 or circuit 108/2 depending on its use.Note 3 - This circuit is optional.Note 4 - When the modem is not operating in a synchronous mode at the in

25、terface, any signals on circuit113 shall be disegarded. Many DTEs operating in an asynchronous mode do not have a generatorconnected to this circuit.Note 5 - When the modem is not operating in a synchronous mode, this circuit shall be clamped to theOFF condition. Many DTEs operating in an asynchrono

26、us mode do not terminate this circuit.Note 6 - This circuit is for use with the general switched telephone network only.3.2 Circuit 106 response times (see Table 5/V.26 ter)Circuit 106 response times are from the application of an ON or OFF condition on circuit 105. See also 6.3for conditions of cir

27、cuit 106 during the operating sequence.TABLE 5/V.26 ter3.3 Threshold and response times of circuit 1093.3.1 ThresholdThe level of received line signal at the receive line terminals of the modem for all types of connections,i.e. the general switched telephone network or non-switched 2-wire leased tel

28、ephone type circuits, is:- greater than -43 dBm: circuit 109 ON- less than -48 dBm: circuit 109 OFFWhere transmission conditions are known and allowed, it may be desirable at the time of modem installation tochange these response levels of the received line signal detector to less sensitive values (

29、e.g. -33 dBm and -38 dBmrespectively).In addition, for use over special quality leased circuits (see Recommendation M.1020) the response levels of thereceived line signal detector shall be:- greater than -26 dBm: circuit 109 ON- less than -31 dBm: circuit 109 OFFConstant carrierCircuit 106OFF to ONO

30、N to OFF 2 ms 2 ms6 Fascicle VIII.1 - Rec. V.26 terThe condition of circuit 109 between the ON and OFF levels is not specified, except that the signal detectorshall exhibit a hysteresis action such that the level at which the OFF to ON transition occurs shall be at least 2 dB greaterthan that for th

31、e ON to OFF transition.3.3.2 Response timeCircuit 109 must turn ON after synchronizing is completed and prior to user data appearing on circuit 104.The ON to OFF response time of circuit 109 is 5 ms to 15 ms. See also 6.3 for the condition of circuit 109during the operating sequence.Following a drop

32、-out after the initial handshake, circuit 109 shall be turned ON 40 to 50 ms after the level ofthe receiver signal appearing at the line terminal of the modem exceeds the relevant threshold defined in 3.3. 1.3.4 Timing arrangementClocks shall be included in the modem to provide the DTE with transmit

33、ter element timing (circuit 114) andreceiver signal element timing (circuit 115). The transmitter element timing may be originated in the DTE and betransferred to the modem via the appropriate interchange circuit, circuit 113.3.5 Electrical characteristics of interchange circuitsUse of electrical ch

34、aracteristics conforming to Recommendation V.28 is recommended together with theconnector and pin assignment plan specified by ISO 2110.Note - Manufacturers may wish to note that the long-term objective is to replace electrical characteristicsspecified in Recommendation V.28, and that Study Group XV

35、II has agreed that the work shall proceed to develop amore efficient, all-balanced, interface for the V-Series application which minimizes the number of interchange circuits.3.6 Fault condition of interchange circuits(See 7 of Recommendation V.28 for association of the receiver failure detection typ

36、es.)3.6.1 The DTE should interpret a fault condition on circuit 107 as an OFF condition using failure detection type 1.3.6.2 The DCE should interpret a fault condition on circuits 105 and 108 as an OFF condition using failure detectiontype 1.3.6.3 All other circuits not referred to above may use fai

37、lure detection types 0 or 1.4 Modes of operationThe modem can be configured for the following modes of operation:Mode i) 2400 bit/s 0.01% synchronousMode ii) 2400 bit/s start-stop 8, 9, 10 or 11 bits per character (optional)Mode iii) 1200 bit/s 0.01% synchronousMode iv) 1200 bit/s start-stop 8, 9, 1

38、0 or 11 bits per character (optional).Fascicle VIII.1 - Rec. V.26 ter 74.1 Transmitter4.1.1 In the synchronous modes of operation, the modem shall accept synchronous data from the DTE on circuit 103under control of circuit 113 or circuit 114. The data shall then be scrambled in accordance with 5 and

39、 then passed tothe modulator for encoding in accordance with 2.5.When circuit 114 is used, the modem shall derive its line signal clock from the internal clock source or,alternatively, from the receive signal element timing.4.1.2 In the start-stop modes, the modem shall accept a data stream of start

40、-stop characters from the DTE at anominal rate of 2400 or 1200 bit/s. The start-stop data to be transmitted shall be converted in conformity withRecommendation V.14 to a synchronous data stream suitable for transmission in accordance with 4.1.1.4.2 Receiver4.2.1 In the synchronous modes of operation

41、, the modem shall give synchronous data to the DTE on circuit 104under control of circuit 115.4.2.2 In the start-stop modes, demodulated synchronous data shall be passed to the converter in conformity withRecommendation V.14 for regaining the data stream of start-stop characters.The intracharacter s

42、ignalling rate provided to the DTE over circuit 104 shall be in the ranges given inTable 6/V.26 ter when operating in the basic or in the extended signalling rate ranges, respectively.TABLE 6/V.26 terIntracharacter signalling rate range5 Scrambler and descramblerEach transmission direction uses a di

43、fferent scrambler. The way to allocate the scramblers/descramblers isdescribed in 6.1.1.A self-synchronizing scrambler/descrambler shall be included in the modem. According to the direction oftransmission (see 6.1) the generating polynominal is: GPC = 1 + x-18+ x-23or GPA = 1 + x-5+ x-23.At the tran

44、smitter the scrambler shall effectively divide the message polynomial (of which the input datasequence represents the coefficients in descending order) by the scrambler generating polynomial to generate thetransmitted sequence; at the receiver the received polynomial (of which the received data sequ

45、ence represents thecoefficient in descending order) shall be multiplied by the scrambler generating polynomial to recover the messagesequence.The detailed scrambling and descrambling processes are described in Appendix I.Data rate Signalling rate rangeBasic Extented2400 bit/s1200 bit/s2400 to 2424 b

46、it/s1200 to 1212 bit/s2400 to 2455 bit/s1200 to 1227 bit/s8 Fascicle VIII.1 - Rec. V.26 ter6 Operating sequence6.1 Scrambler/descrambler allocation and signalling rate selection6.1.1 General switched telephone network (GSTN)On the general switched telephone network the modem at the calling data stat

47、ion shall use the scrambler withthe GPC generating polynomial and the descrambler with the GPA generating polynomial (call mode). The modem atthe answering data station shall use the scrambler with the GPA generating polynomial and the descrambler with theGPC generating polynomial (answer mode).In s

48、ome situations, however, for example, when calls are established on the GSTN by operators, bilateralagreement on call mode/answer mode allocation will be necessary.The calling and answering modems automatically condition themselves to operate at the correct data signallingrate by exchanging rate pat

49、terns at the bit rate of 1200 bit/s during the operating sequences, as defined in 6.3.1.6.1.2 Point-to-point leased circuitsScrambler/descrambler allocation, data signalling rate selection and call mode and answer mode designation onpoint-to-point leased circuits will be by bilateral agreement between Administrations or users.6.1.3 Rate patternsThe rate pattern is a scrambled sequence of a particular repeated octet transmitted 32 times.Out of the possible 256 binary numbers, the 34 following hexadecimal numbers are selected:01 - 03 -