ITU-T G 727-1990 5- 4- 3- and 2-Bits Sample Embedded Adaptive Differential Pulse Code Modulation (ADPCM) (Study Group XV) 58 pp《5-、4-、3-和2-比特 抽样嵌入自适应差分脉冲编码调制(ADPCM)》.pdf

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1、CCITT RECMN*G.727 90 4862571 0561AAb 4 W INTERNATIONAL TELECOMMUNICATION UNION CCITT THE INTERNATIONAL TELEGRAPH AND TELEPHONE CONSULTATIVE COMMITTEE GENERAL ASPECTS OF DIGITAL TRANSMISSION SYSTEMS; TERMINAL EQUIPMENTS G.727 5, 41, 3- AND 2-BITS SAMPLE EMBEDDED ADAPTIVE DIFFERENTIAL PULSE CODE MODUL

2、ATION (ADPCM) Recommendation G.727 Geneva, 1990 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handling Services- CCITT RECNN*G*7Z7 90 48b259L 05bLBB7 b NTERNATIONAL TELECOMMUNICATION UNION G.727 CCITT THE INTERNATIONAL TELEGRAPH AND TELEPHONE CONSULTA

3、TIVE COMM ITTEE GENERAL ASPECTS OF DIGITAL TRANSMISSION SYSTEMS; TERMINAL EQUIPMENTS 51, 41, 3- AND %BITS SAMPLE EMBEDDED ADAPTIVE DIFFERENTIAL PULSE CODE MODULATION (ADPCM) Recommendation G.727 i Geneva, 1990 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Informa

4、tion Handling ServicesCCITT RECMN*G.727 90 i862571 0561888 B = FOREWORD The CCIT (the International Telegraph and Telephone Consultative Cornmittee) is a permanent organ of the International Telecommunication Union (ITU). CCITT is responsible for studying technical, operating and tariff questions an

5、d issuing Recommendations on them with a view to standardizing telecommunications on a worldwide basis. The Plenary Assembly of CCITT which meets every four years, establishes the topics for study and approves Recommendations prepared by its Study Groups. The approval of Recommendations by the membe

6、rs of CCIT between Plenary Assemblies is covered by the procedure laid down in CCITT Resolution No. 2 (Melbourne, 1988). Recommendation G.727 was prepared by Study Group XV and was approved under the Resolution No. 2 procedure on the 14th of December 1990. CCIIT NOTE In this Recommendation, the expr

7、ession “Administration” is used for conciseness to indicate both a telecommunication Administration and a recognized private operating agency. O IT 1990 All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including pho

8、tocopying and microfilm, without permission in writing from the ITU. COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handling ServicesCCITT RECMN*G-727 90 4862591 0561889 T Recommendation G.727 5, 4-, 3- AND 2-bits SAMPLE EMBEDDED ADAPTIVE DIFFERENTIAL

9、PULSE CODE MODULATION (ADPCM) 1 Introduction This Recommendation contains the specification of an embedded Adaptive Differential Pulse Code Modulation (ADPCM) algorithms with 5-, 4-, 3- and 2-bits per sample (Le., at rates of 40, 32, 24 and 16 kbit/s). The characteristics below are recommended for t

10、he conversion of 64 kbit/s. A-law or p-law PCM channels to/ from variable rate-embedded ADPCM channels. The Recommendation defines the transcoding law when the source signal is a pulse-code modulation signal at a pulse rate of 64 kbit/s developed from voice frequency analog signals as fully specifie

11、d by Blue Book Volume, Recommendation G.711. Applications where the encoder is aware and the decoder is not aware of the way in which the ADPCM codeword bits have been altered, or when both the encoder and decoder are aware of the ways the codewords are altered, or where neither the encoder nor the

12、decoder are aware of the ways in which the bits have been altered can benefit from other embedded ADPCM algorithms. 2 General The embedded ADPCM algorithms specified here are extensions of the ADPCM algorithms defined in Recommendation G.726 and are recommended for use in packetized speech systems o

13、perating according to the Packetized Voice Protocol (PVP) specified in draft Recommendation G.764. PVP is able to relieve congestion by modifying the size of a speech packet when the need arises. Utilizing the embedded property of the algorithm described here, the least significant bit(s) of each co

14、deword can be disregarded at packetization points and/or intermediate nodes to relieve congestion. This provides for significantly better performance than by dropping packets during congestion. Section 3 outlines a description of the ADPCM transcoding algorithm. Figure UG.727 shows a simplified bloc

15、k diagram of the encoder and the decoder. Sections 4 and 5 provide the principles and functional descriptions of the ADPCM encoding and decoding algorithms, respectively. Section 6 contains the computational details of the algorithm. In this section, each sub-block in the encoder and decoder is prec

16、isely defined using one particular logical sequence. If other methods of computation are used, extreme care should be taken to ensure that they yield exactly the same value for the output processing variables. Any further departures from the processes detailed in Section 6 will incur performance pen

17、alties which may be severe. Recommendation G.727 1 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handling ServicesCCITT RECMN*G.727 90 4862593 05b1890 b m A- or p-law 64 kbitls PCM input * Difference Convert to signal signal ADPCM uniform PCM masking

18、I Signal est i mate I Reconstructed signal difference signal a) Encoder A- or p-law 64 kbitls PCM output ADPCM input Tl50263-YO bl Decoder FIGURE 1/G.727 Simpliied block diagrams 3 Embedded ADPCM algorithms Embedded ADPCM algorithms are variable bit rate coding algorthms with the capability of bit r

19、opping outside the encoder and decoder blocks. They consist of a series of algorithms such that the decision levels of the lower rates quantizers are subsets of the quantizer at the highest rate. This allows bit reductions at any point in the network without the need of coordination between the tran

20、smitter and the receiver. In contrast, the decision levels of the conventional ADPCM algorithms. such as those in Recommendation G.726, are not subsets of one another and therefore, the transmitter must inform the receiver of the coding rate the encoding algorithm. Embedded algorithms can accommodat

21、e the unpredictable and bursty characteristics of traffic patterns that require congestion relief. Because congestion relief may occur after the encoding is performed, embedded coding is different from variable-rate coding where the encoder and decoder must use the same number of bits in each sample

22、. In both cases, the decoder must be told the number of bits to use in each sample. 2 Recommendation G.727 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handling ServicesCCITT RECMN*G-727 70 4462591 05bL89L B Embedded algorithms produce code words whi

23、ch contain enhancement bits and core bits. The Feed-Forward CFF) path utilizes enhancement and core bits, while the Feedback (FB) path uses core bits only. The inverse quantizer and the predictor of both the encoder and the decoder use the core bits. With this structure, enhancement bits can be disc

24、arded or dropped during network congestion. However, the number of core bits in the FB paths of both the encoder and decoder must remain the same to avoid mistracking. The four embedded ADPCM rates are 40, 32, 24 and 16 kbit/s, where the decision levels for the 32, 24 and 16 kbit/s quantizers are su

25、b-sets of those for the 40 kbit/s quantizer. Embedded ADPCM algorithms are referred to by (x, y) pairs where x refers to the FF (enhancement and core) ADPCM bits and y refers to the FB (core) ADPCM bits. For example, if y is set to 2 bits, (5,2) will represent the 40 kbits/s embedded algorithm, (4,2

26、) will represent the 32 kbit/s embedded algorithm, (3,2) will represent the 24 kbit/s embedded algorithm and (2,2) the 16 kbit/s algorithm. The bit rate is never less than 16 kbit/s because the minimum number of core bits is 2. Simplified block diagrams of both the embedded ADPCM encoder and decoder

27、 are shown in Figure UG.727. The Recommendation provides coding rates of 40,32,24 and 16 kbit/s and core rates of 32,24 and 16 kbit/s. This corresponds to the following pairs: (5,2), (4,2), (3,2), (2,2); (5,3), (4,3), (3,3); (5,4), (4,4). 3.1 ADPCM encoder Subsequent to the conversion of the A-law o

28、r p-law PCM input signal to uniform PCM, a difference signal is obtained by subtracting an estimate of the input signal from the input signal itself. An adaptive 4-, 8-, 16- or 32-level quantizer is used to assign 2,3,4 or 5 binary digits to the value of the difference signal for transmission to the

29、 decoder. (Not all the bits necessarily arrive at the decoder since some of these bits can be dropped to relieve congestion in the packet network. For a given received sample, however, the core bits are guaranteed arrival if there are no transmission errors and the packets arrive at destination.) FE

30、3 bits are fed to the inverse quantizer. The number of core bits depends on the embedded algorithm selected. For example, the (5,2) algorithm will always contain 2 core bits. The inverse quantizer produces a quantized difference signal from these binary digits. The signal estimate is added to this q

31、uantized difference signal to produce the reconstructed version of the input signal. Both the reconstructed signal and the quantized difference signal are operated upon by an adaptive predictor which produces the estimate of the input signal, thereby completing the feedback loop. 3.2 ADPCM decoder T

32、he decoder includes a structure identical to the FB portion of the encoder. In addition, there is also an FF path that contains a uniform PCM to A-law or p-law conversion. The core as well as the enhancement bits are used by the synchronous coding adjustment block to prevent cumulative distortion on

33、 synchronous tandem codings (ADPCM-PCM-ADPCM, etc., digital connections) under certain conditions (see Q 5.10). The synchronous coding adjustment is achieved by adjusting the PCM output codes to eliminate quantizing distorsion in the next ADPCM encoding stage. 3.3 Ones density requirements These alg

34、orithms produce the all-zero code words. If requirements on ones density exist in national networks, other methods should be used to ensure that this requirement is satisfied. Recommendation G.727 3 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handli

35、ng Services3.4 Applications In the anticipated application with G.764, the Coding Type (CT) field and the block Dropping Indicator (BDI) field in the packet header defined in G.764 will inform the coder of what algorithm to use. For all other applications, the information that PVP supplies must be m

36、ade known to the decoder. 4 ADPCM encoder principles Figure 2/G.727 is a block schematic of the encoder. For each variable to be described, k is the sampling index and samples are taken at 125 p intervals. A description of each block is given in $3 4.1 to 4.9. I(k) ADPCM output Reconstructed signal

37、calculator adaptation control a, k) I T1502640-90 FIGURE 2/G.121 Encoder block schematic 4.1 Input PCM format conversion This block converts the input signal s(k) from A-law or p-law PCM to a uniform PCM signal si). 4.2 Difference signal computation This block calculates the difference signal (k) fr

38、om the uniform PCM signal si(k) and the signal estimate Sthe discrete function wZc(k) is defined as follows (infinite precision values): Recommendation G.727 7 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handling ServicesCCITT RECMN8G.727 90 4B6259L

39、 0561896 7 I I or for 3-core-bit (1 sign bit) operation; or for 4-core-bit (1 sign bit) operation. Thus, d,(k) is a relatively short term average of Fl,(k)l and h(k) is a relatively long term average of Using these two averages, the variable up(k - i) s,(k - i) + se with the stability constraints; I

40、 a2(k) I 5 0.75 and I ui(k) I I 1 - 2-4 - u2(k) for i = If t,(k) = 1 (see Q 4.9), then ai(k) = a2(k) = O. For the sixth order predictor: bi(k) = (1 - 2-8) bi(k - 1) + 2-7 sgn Ed + Arithmetic addition; - Arithmetic subtraction; * Arithmetic multiplication; * Logical “exclusive or” operation; I I Comm

41、ents to equations. I n-bit shift left operation (zero fill); n-bit shift right operation (in the direction of the least significant bit and zero fill); 6.2.1 Input PCM format conversion and difference signal computation FIGURE 4/G.727 Input PCM format conversion and dierenee signal computation 18 Re

42、commendation G.727 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information Handling ServicesCCITT RECMN*G*727 90 48b2591 05611707 8 EXPAND Input: output: SL (SLX in decoder) Function: Decode PCM code word, S, according to Recommendation G.72 1 using character s

43、ignals (column 6, before inversion of even bits for A-law) and values at decoder output (column 7). The values at decoder output, SS, must be represented in 13-bit signed magnitude form for A-law PCM and 14-bit signed magnitude form for p-law PCM (the sign bit is equal to one for negative values). N

44、ote -For A-law S (and SP) includes even bit inversion (see Note 2 below Table UG.711). S (SP in decoder), LAW Convert either A-law or p-law PCM to uniform PCM. when LACV=O, SSS = SS 13 SSQ = SS&8191 when LAW = 1, SSS = SS 12 SSM = SS & 4095 SSQ = SSM 13 sLs=o L2+sr, su= 1 SLI = SES = SE 14 sEs=o ri6

45、8 + SE, SES = 1 SEI = D = (SLI + 65536 - SEI) & 65535 6.2.2 Adaptive quantizer DS I I Sign extension I I I Sign extension I $-lE,&p SUBTE im67a-w FIGURE 5/G.727 Adaptive quantizer 20 Recommendation G.727 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicensed by Information H

46、andling ServicesCCITT RECMN*G-727 90 4862593 0563909 3 LOG Input: D (DX in decoder) Outputs: Function: DL (DLX in decoder), DS (DSX in decoder) Convert difference signal from the linear to the logarithmic domain. DS=D 15 DQM = EXP = D, DS=Q J6.5536 - D) & 32767, DS = 1 14, 16384 I DQM 13, 8192 I DQM

47、 I 16383 MANT = (DQM EXP) & 127 DL = (EXP 2) & 4095 6.2.3 Bit masking - Ti502680-90 FIGURE 6/G.727 Bit masking input: I) or I) Outputs: I,(k) Function: Note: Masking of quantized difference signal to extract the core bits. Figure 6/G.727 and equations are given for the encoder. They are also valid w

48、hen substituting I(k) for I(k) for the decoder. I, = I E, E = Enhancement Bits. 6.2.4 Inverse adaptive quantizer 1 DQF B RECONST ADDA ANTILOG Y Tl.502690-90 FIGURE 7/G.727 Inverse adaptive quantizer Recommendation G.727 25 COPYRIGHT International Telecommunications Union/ITU TelecommunicationsLicens

49、ed by Information Handling Services CCITT RECMNrG.727 90 = 4862591 0561914 5 12 o1 O0 11 10 RECONST DQ%B DQWB O 365 O 116 1 116 1 365 Input: I, or I (k) I or I, DQSwor 123 DQSm o1 1 O O10 O O01 O O00 O 111 1 110 1 101 1 100 1 Outputs: DQSm or DQSE, DQLNm or DQLNw DQLNwor DQLNFB 395 307 199 4085 4085 199 307 395 Function: Reconstruction of quantized difference signai in the logarithmic domain. Note: Figure 7/G.727, equations and tables are given for the feed-back path. They are also valid when substituting I(k) for Ic(k), DQSw for DQSFB and DQLNm for DQLNm