DLA SMD-5962-99577 REV B-2002 MICROCIRCUIT DIGITAL-LINEAR CMOS 12-BIT ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON《微型电路 数字线型 CMOS 12位模数转换器 单块硅》.pdf

《DLA SMD-5962-99577 REV B-2002 MICROCIRCUIT DIGITAL-LINEAR CMOS 12-BIT ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON《微型电路 数字线型 CMOS 12位模数转换器 单块硅》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-99577 REV B-2002 MICROCIRCUIT DIGITAL-LINEAR CMOS 12-BIT ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON《微型电路 数字线型 CMOS 12位模数转换器 单块硅》.pdf（34页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make change to gain error test under the accuracy section as specified in table I. Make change to FIFO trigger level name under the control register 1 bit functions table as specified in figure 2. Make change to read and write timing table names

2、as specified in figure 4. - ro 00-09-08 R. Monnin B Drawing updated to reflect current requirements. gt 02-07-10 R. Monnin REV SHET REV B B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2

3、3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY RAJESH PITHADIA COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY RAYMOND MONNIN MICROCIRCUIT, DIGITAL-LIN

4、EAR, CMOS, 12-BIT, ANALOG-TO-DIGITAL CONVERTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 00-02-16 MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-99577 SHEET 1 OF 33 DSCC FORM 2233 APR 97 5962-E392-02 DISTRIBUTION STATEMENT A. Approved for public relea

5、se; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope.

6、This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment (device class N). A choice of case outlines and lead finishes are available and are reflected in the Par

7、t or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class N, the user is cautioned to assure that the device is appropriate for the application environment. 1.2 PIN. The PIN is as shown in the following example: 59

8、62 - 99577 01 N X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 spe

9、cified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify

10、 the circuit function as follows: Device type Generic number Circuit function 01 THS1206 CMOS, 12-bit, 6 MSPS, analog-to-digital converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirement

11、s documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A N Certification and qualification to MIL-PRF-38535 with a nontraditional performance environment (encapsulated in plastic) 1/ Q

12、or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 32 Plastic thin shrink small outline package with gull wing leads 1.2.5 Lead

13、 finish. The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, appendix A for device class M. 1/ Items which have been subjected to and passed all applicable requirements of this specification including qualification testing, screening testing, and TCI/QCI

14、 inspections, and are encapsulated in plastic. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3

15、 Absolute maximum ratings. 1/ Supply voltage range: DGND to DVDD.-0.3 V to 6.5 V BGND to BVDD-0.3 V to 6.5 V AGND to AVDD-0.3 V to 6.5 V Analog input voltage range.AGND 0.3 V to AVDD+ 1.5 V Reference input voltage-0.3 V + AGND to AVDD+ 0.3 V Digital input voltage range-0.3 V to BVDD/ DVDD+ 0.3 V Pow

16、er dissipation (PD) (TA 25C).1453 mW 2/ Operating virtual junction temperature range (TJ) -55C to +150C Storage temperature range .-65C to +150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds.260C Thermal resistance, junction-to-case (JC) 8.1C/W 1.4 Recommended operating conditions. Po

17、wer supply section Supply voltage: AVDD.4.75 V to 5.25 V DVDD.3 V to 5.25 V BVDD.3 V to 5.25 V Analog and reference inputs section Analog input voltage in single-ended configuration.VREFMto VREFPCommon-mode input voltage VCMin differential configuration.1 V to 4 V External reference voltage, VREFPAV

18、DD 1.2 V maximum External reference voltage, VREFM.1.4 V minimum Digital inputs section High-level input voltage (VIH): With BVDD= 3.3 V.2 V minimum With BVDD= 5.25 V.2.6 V minimum Low-level input voltage (VIL) With BVDD= 3.3 V.0.6 V maximum With BVDD= 5.25 V.0.6 V maximum Input CONV_CLK frequency,

19、(with DVDD= 3 V to 5.25 V) .0.1 MHz to 6 MHz CONV_CLK pulse duration, clock high, tW(CONV_CLKH): With DVDD= 3 V to 5.25 V80 ns to 5000 ns CONV_CLK pulse duration, clock low, tW(CONV_CLKL): With DVDD= 3 V to 5.25 V80 ns to 5000 ns Ambient operating temperature (TA) -55C to +125C 1/ Stresses above the

20、 absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ The derating factor above TA= +25C is 11.62 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

21、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a

22、part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFE

23、NSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard M

24、icrocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government public

25、ations. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not li

26、sted in the DODISS are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC publication 95 Registered and Standard Outlines for Semiconductor Devices. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulev

27、ard, Arlington, VA 22201-3834). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the eve

28、nt of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The indivi

29、dual item requirements for device classes N, Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The indivi

30、dual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99577

31、 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes N, Q, and V or MIL-PRF-38

32、535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connection(s). The terminal connection(s) shall be as specified on figure 2. 3.2.3 Block diagram(s). The block diagram(s) shall be as specif

33、ied on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figure 4. 3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are

34、 as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be m

35、arked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RH

36、A product using this option, the RHA designator shall still be marked. Marking for device classes N, Q, and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for d

37、evice classes N, Q, and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes N, Q, and V, a certificate of compliance shall be required from a QML-3853

38、5 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of complian

39、ce submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes N, Q, and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3

40、.7 Certificate of conformance. A certificate of conformance as required for device classes N, Q, and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For de

41、vice class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity

42、 retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in micro

43、circuit group number 81 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 6 DSCC FORM 2234

44、APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C VREF= internal Group A subgroups Device type Limits Unit unless otherwise specified Min Max Digital inputs section High-level input current IIHDVDD= digital inputs 1,2,3 01 -50 50 A Low-level input current I

45、ILDigital input = 0 V 1,2,3 01 -50 50 A Digital outputs section High-level output voltage VOHIOH= -50 A, BVDD= 3.3 V 1,2,3 01 BVDD 0.5 V IOH= -50 A, BVDD= 5 V BVDD 0.5 Low-level output voltage VOLIOL= 50 A, BVDD= 3.3 V 1,2,3 01 0.4 V IOL= 50 A, BVDD= 5 V 0.4 High-impedance-state output current IOZCS

46、1 = DGND, CS0 = DVDD1,2,3 01 -10 10 A Load capacitance at databus D0 D11 CL1,2,3 01 30 pF Resolution RES 4,5,6 01 12 Bits Accuracy section Integral nonlinearity INL 1,2,3 01 1.8 LSB Differential nonlinearity DNL 1,2,3 01 1.0 LSB Offset error voltage 1/ OE After calibration in single- ended mode 1,2,

47、3 01 -15 15 mV After calibration in differential mode -5 5 Gain error 1/ GE 1,2,3 01 1 %FSR Analog input section Input leakage current IINLVAIN= VREFMto VREFP1,2,3 01 10 A Internal voltage reference section Accuracy VREFP1,2,3 01 3.3 3.7 V VREFM1.3 1.7 REFOUT 2.3 2.7 See footnotes at end of table. P

48、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C VREF= internal Group A subgroups Device type Limits Unit unless otherwise specified Min Max Power supply section Analog supply current IDDAAVDD= 5 V, BVDD= DVDD= 3.3 V 1,2,3 0