DLA SMD-5962-96902 REV F-2004 MICROCIRCUIT HYBRID MEMORY STATIC RANDOM ACCESS MEMORY (SRAM) 256K X 16-BIT《静态随机存储器256K X 16-BIT混合记忆微电路》.pdf

《DLA SMD-5962-96902 REV F-2004 MICROCIRCUIT HYBRID MEMORY STATIC RANDOM ACCESS MEMORY (SRAM) 256K X 16-BIT《静态随机存储器256K X 16-BIT混合记忆微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-96902 REV F-2004 MICROCIRCUIT HYBRID MEMORY STATIC RANDOM ACCESS MEMORY (SRAM) 256K X 16-BIT《静态随机存储器256K X 16-BIT混合记忆微电路》.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outlines N and T. 98-06-01 K. A. Cottongim B Changed figure 1 for case outlines N and T to allow for pedestal or non-pedestal version of these case outlines. -sld 98-12-09 K. A. Cottongim C Added device type 04. -sld 99-04-02 K. A. Cotto

2、ngim D Add note to paragraph 1.2.2 and table I. Table I, add note 3 to CINand COUTtests. 00-11-03 Raymond Monnin E Made corrections to table I in the conditions for the standby current and output leakage current tests. Made corrections to figures 5 and 6. Updated drawing to reflect the latest requir

3、ements of MIL-PRF-38534. -sld 03-12-22 Raymond Monnin F Table I; Changed the IOLfrom 8 mA to 6 mA VOLtest. Editorial changes throughout. -sld 04-10-25 Raymond Monnin REV SHEET REV F F F F F SHEET 15 16 17 18 19 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13

4、14 PMIC N/A PREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil/ APPROVED BY Kendall A. Cottongim THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF D

5、EFENSE DRAWING APPROVAL DATE 97-12-23 MICROCIRCUIT, HYBRID, MEMORY, STATIC RANDOM ACCESS MEMORY (SRAM) 256K x 16-BIT AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-96902 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E012-05 Provided by IHSNot for ResaleNo reproduction or networking permitted witho

6、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A

7、 choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 96902 01 H M X Feder

8、al RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA leve

9、ls and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 1/ Generic number Circuit function Access time 01 WMS256K16-35DL SRAM, 256K x 16-bit 35 ns 02 WMS256K16-25

10、DL SRAM, 256K x 16-bit 25 ns 03 WMS256K16-20DL SRAM, 256K x 16-bit 20 ns 04 WMS256K16-17DL SRAM, 256K x 16-bit 17 ns 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-385

11、34 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Stan

12、dard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperat

13、ure range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. T

14、hese exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. 1/ Due to the nature of the 4 transistor design of the die used in these device types, top

15、ologically pure testing is important, particularly for high reliability applications. The device manufacturer should be consulted concerning their testing methods and algorithms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D

16、RAWING SIZE A 5962-96902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. 1.2.

17、4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style M See figure 1 44 Ceramic SOJ N See figure 1 44 Ceramic flat pack T See figure 1 44 Ceramic flat pack, lead formed 1.2.5 Lead finish. The lead finish

18、 shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V to +7.0 V Input voltage range . -0.5 V to +7.0 V Power dissipation(PD) 1.6 W Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C 1.4 Recommended operating

19、conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.3 V dc to +0.8 V dc Input high voltage range(VIH). +2.2 V dc to VCC + 0.5 V dc Output voltage, high minimum (VOH) . +2.4 V dc Output voltage, low maximum (VOL) . -0.5 V to +7.0 V Case operating temperature

20、 range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

21、 solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF DE

22、FENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue,

23、Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

24、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

25、 this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance

26、 with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspection

27、s herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dime

28、nsions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3

29、 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4 and 5. 3.2.5 Output load circuit. The output load circuit shall be as specified in figure 6. 3.3 Electrical performance characteristics. Unless oth

30、erwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests f

31、or each subgroup are defined in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general

32、performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all

33、 parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall b

34、e required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conforman

35、ce as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

36、43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc, VSS= 0 V unless otherwise specified Group A subgroups Device types Min Max Unit DC parameters Operating supply current I

37、CCCS = VIL, OE = VIH,f = 5 MHz, VCC= 5.5 V dc 1, 2, 3 All 275 mA Standby current ISBCS = VIH, OE = VIH,f = 5 MHz, VCC= 5.5 V dc 1, 2, 3 All 17 mA Input leakage current ILIVCC= 5.5 V dc, VIN= GND to VCC1, 2, 3 All 10 A Output leakage current ILOCS = VIH, OE = VIH, VOUT= GND to VCC1, 2, 3 All 10 A Out

38、put low voltage VOLIOL= 6 mA, VCC= 4.5 V 1, 2, 3 All 0.4 V Output high voltage VOHIOH= -4.0 mA, VCC= 4.5 V 1, 2, 3 All 2.4 V Dynamic characteristics Input capacitance 3/ CINVIN= 0 V, f = 1.0 MHz 4 All 20 pF Output capacitance 3/ COUTVOUT= 0 V, f = 1.0 MHz 4 All 20 pF Data retention characteristics D

39、ata retention supply voltage VDRCS VCC- 0.2 V 1, 2, 3 All 2.0 5.5 V Data retention current ICCDR1 VCC= 3.0 V 1, 2, 3 All 8.0 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

40、6902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc, VSS= 0 V Unless otherwise specified Group A subgroups Dev

41、ice types Min Max Unit Functional testing Functional tests See 4.3.1c 7, 8A, 8B All Read cycle AC timing characteristics Read cycle time tRCSee figure 4 9, 10, 11 01 02 03 04 35 25 20 17 ns Address access time tAASee figure 4 9, 10, 11 01 02 03 04 35 25 20 17 ns Output hold from address change tOHSe

42、e figure 4 9, 10, 11 All 0 ns Chip select access time tACSSee figure 4 9, 10, 11 01 02 03 04 35 25 20 17 ns Output enable to output valid tOESee figure 4 9, 10, 11 01 02 03 04 20 15 12 10 ns 01,02,03 5 Chip select to output enable in low Z 3/ tCLZSee figure 4 9, 10, 11 04 2 ns Output enable to outpu

43、t in low Z 3/ tOLZSee figure 4 9, 10 ,11 All 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F

44、 SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc, VSS= 0 V unless otherwise specified Group A subgroups Device types Min Max Unit Read cycle AC timing characteristics Continued. Chip en

45、able to output in high Z 3/ tCHZSee figure 4 9, 10, 11 01 02 03 04 15 12 10 9 ns Output enable to output in high Z 3/ tOHZSee figure 4 9, 10, 11 01 02 03 04 15 12 10 9 ns LB, UB, access time tBASee figure 4 9, 10, 11 01 02 03 04 17 14 12 10 ns LB, UB, enable to low Z output 3/ tBLZSee figure 4 9, 10

46、, 11 All 0 ns LB, UB, disable to high Z output 3/ tBHZSee figure 4 9, 10, 11 01 02 03 04 15 12 10 9 ns Write cycle AC timing characteristics. Write cycle time tWCSee figure 5 9, 10, 11 01 02 03 04 35 25 20 17 ns Chip select to end of write tCWSee figure 5 9, 10, 11 01 02 03 04 25 20 17 14 ns Address

47、 valid to end of write tAWSee figure 5 9, 10, 11 01 02 03 04 25 20 17 14 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96902 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4

48、3218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc, VSS= 0 V Unless otherwise specified Group A subgroups Device types Min Max Unit Write cycle AC timing characteristics - Continued. Data valid to end of write tDWSee figure 5 9, 10, 11 01 02 03 04 20 15 12 10 ns Write pulse width tWPSee figure 5 9, 10, 11 0