DLA SMD-5962-96837 REV A-2009 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 8000 GATES MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update drawing to current requirements. Editorial changes throughout. tcr 09-06-17 Joseph Rodenbeck REV SHEET REV A A A SHEET 15 16 17 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth R

2、ice DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Michael. A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY 8000 GATES, M

3、ONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 00-01-18 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 672685962-96837 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E334-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

4、NDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-96837 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space applica

5、tion (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 96

6、837 01 M X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA

7、levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circui

8、t function as follows: Device type Generic number Circuit function Delay Factor (K) Min Max 01 QL24X32B-0 8000 Gate CMOS FPGA 0.39 1.82 02 QL24X32B-1 8000 Gate CMOS FPGA 0.39 1.56 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as

9、 follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case

10、 outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 208 Quad flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for devic

11、e class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-96837 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply

12、 voltage range (VCC) - -2.0 V dc to +7.0 V dc Programming supply voltage range (VPP) - -2.0 V dc to +13.5 V dc 2/ DC input voltage range - -2.0 V dc to +7.0 V dc 2/ Maximum power dissipation - 2.5 W 3/ Lead temperature (soldering, 10 seconds) - +300C Thermal resistance, junction-to-case (JC): Case o

13、utline X - 5.3 C/W Junction temperature (TJ) - +175C 4/ Storage temperature range - -65C to +150C Data retention - 10 years (minimum) 1.4 Recommended operating conditions. 5/ Case operating temperature Range(TC) - -55C to +125C Supply voltage relative to ground(VCC) - +4.5 V dc minimum to +5.5 V dc

14、maximum Ground voltage (GND) - 0 V dc Input high voltage (VIH) - 2.0 V dc minimum Input low voltage (VIL) - 0.8 V dc maximum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent

15、 specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method S

16、tandard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.

17、mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect relia

18、bility. 2/ Minimum dc input voltage is -0.5 V, which may overshoot to -2.0 V for periods less than 20 ns. Maximum dc voltage on output pins is VCC+ 0.5 V, which may overshoot to +7.0 V for periods less than 20 ns under load conditions. 3/ Must withstand the added PDdue to short circuit test (e.g., I

19、OS). 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ All voltage values in this drawing are with respect to VSS. Provided by IHSNot for ResaleNo reproduction or networking permitt

20、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-96837 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein

21、. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semicond

22、uctor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard JESD 78 - IC Latch-Up Test. (Applications for co

23、pies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be a

24、vailable in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regula

25、tions unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modif

26、ication in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensio

27、ns. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Termi

28、nal connections. The terminal connections shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I

29、 and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are described in table I. 3.5 Marking. The part shall be marked with the PIN liste

30、d in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator sh

31、all still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as requi

32、red in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements o

33、f this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source

34、 of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitte

35、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-96837 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

36、or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing i

37、s required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made av

38、ailable onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.11 Processing options. Since the device is capable of being programmed by e

39、ither the manufacturer or the user to result in a wide variety of configurations, two processing options are provided for selection in the contract. 3.11.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in table IIA. It is recommended that

40、 users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.11.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied b

41、y the manufacturer prior to delivery. 3.12 Data Retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process changes which may affect data retention. The methods and proced

42、ures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with the test

43、data. 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or func

44、tion as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and tec

45、hnology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (pre-burn-in)

46、 electrical parameters through interim (post-burn-in) electrical parameters of method 5004 and substitute lines 1 through 5 of table IIA herein. b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring

47、 activity upon request. Test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. Use of built-in test circuitry testing the entire lot to verify programmability and AC performance without programming the user array is an option the manufacturer may use. c. Interim and final electri