DLA SMD-5962-96611 REV C-2004 MICROCIRCUIT DIGITAL RADIATION HARDENED CMOS QUAD EXCLUSIVE OR AND EXCLUSIVE NOR GATES MONOLITHIC SILICON《抗辐射互补金属氧化物半导体四重排外或与门硅单片电路数字微电路》.pdf
《DLA SMD-5962-96611 REV C-2004 MICROCIRCUIT DIGITAL RADIATION HARDENED CMOS QUAD EXCLUSIVE OR AND EXCLUSIVE NOR GATES MONOLITHIC SILICON《抗辐射互补金属氧化物半导体四重排外或与门硅单片电路数字微电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96611 REV C-2004 MICROCIRCUIT DIGITAL RADIATION HARDENED CMOS QUAD EXCLUSIVE OR AND EXCLUSIVE NOR GATES MONOLITHIC SILICON《抗辐射互补金属氧化物半导体四重排外或与门硅单片电路数字微电路》.pdf(23页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R207-97. 97-03-14 Monica L. Poelking B Changes in accordance with NOR 5962-R387-97. 97-07-25 Raymond Monnin C Incorporate revisions A and B. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes t
2、hroughout. LTG 04-02-02 Thomas M. Hess REV SHET REV C C C C C C C C SHEET 15 16 17 18 19 20 21 22 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking DEFENSE SUPPLY CE
3、NTER COLUMBUS COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-12-05 MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD EXCLUSIVE OR AND EXCLUSIVE NOR G
4、ATES, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-96611 SHEET 1 OF 22 DSCC FORM 2233 APR 97 5962-E130-04 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license
5、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) a
6、nd space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following ex
7、ample: 5962 R 96611 01 V X C Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535
8、specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) ident
9、ify the circuit function as follows: Device type Generic number Circuit function 01 4070B Radiation hardened CMOS, quad exclusive OR gate 02 4077B Radiation hardened CMOS, quad exclusive NOR gate 03 4070BN Radiation hardened CMOS, quad exclusive OR gate with neutron irradiated die 04 4077BN Radiatio
10、n hardened CMOS, quad exclusive NOR gate with neutron irradiated die 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MI
11、L-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals P
12、ackage style C CDIP2-T14 14 Dual-in-line package X CDFP3-F14 14 Flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without li
13、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.5 V dc to +20 V dc Input voltage range . -0.5 V dc to VDD+ 0
14、.5 V dc DC input current, any one input . 10 mA Device dissipation per output transistor . 100 mW Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) +265C Thermal resistance, junction-to-case (JC): Case C 24C/W Case X 30C/W Thermal resistance, junction-to-ambient
15、 (JA): Case C 74C/W Case X 116C/W Junction temperature (TJ). +175C Maximum power dissipation at TA= +125C (PD): 4/ Case C 0.68 W Case X 0.43 W 1.4 Recommended operating conditions. Supply voltage range (VDD) 3.0 V dc to +18 V dc Case operating temperature range (TC). -55C to +125C Input voltage (VIN
16、) 0 V to VDDOutput voltage (VOUT). 0 V to VDDRadiation features: Total dose . 1 x 105Rads (Si) Single event phenomenon (SEP) effective linear energy threshold, no upsets or latchup (see 4.4.4.5) 75 MeV/(cm2/mg) 5/ Dose rate upset (20 ns pulse) . 5 x 108 Rads(Si)/s 5/ Dose rate latch-up 2 x 108Rads(S
17、i)/s 5/ Dose rate survivability 5 x 1011Rads(Si)/s 5/ Neutron irradiated 1 x 1014neutrons/cm26/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless oth
18、erwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General
19、 Specification for. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters spe
20、cified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise noted. 4/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA) at the following rate: Case C. 13.5 mW/C Cas
21、e X. 8.6 mW/C 5/ Guaranteed by design or process but not tested. 6/ Device types 03 and 04 only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
22、REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 -
23、 Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between t
24、he text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for
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