DLA SMD-5962-96533 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED 4-WIDE 2-INPUT AND-OR-INVERT GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-96533 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED 4-WIDE 2-INPUT AND-OR-INVERT GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96533 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED 4-WIDE 2-INPUT AND-OR-INVERT GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(15页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R115-97. 96-12-12 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-09-04 Thomas M. Hess C Correct the title to accurately describe the device function. Chang
2、e figure 4, switching waveforms and test circuit. Update boilerplate to the latest MIL-PRF-38535 requirements. - jak 07-08-23 Thomas M. Hess D Update boilerplate paragraphs and radiation paragraphs 4.4.4.1 4.4.4.4 to the current MIL-PRF-38535 requirements. Delete class M requirement throughout.- LTG
3、 13-12-17 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING I
4、S AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, 4-WIDE 2-INPUT AND-OR-INVERT GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL
5、DATE 96-04-05 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-96533 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E081-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96533 DLA LAND AND MARITIME COLUMBUS, OHIO 432
6、18-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in
7、the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96533 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device c
8、lass designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2
9、 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACTS54 Radiation hardened, 4-wide 2-input AND-OR-INVERT gate, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying
10、 the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C
11、 GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962
12、-96533 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.
13、3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum package power
14、 dissipation (PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise or fall time at VDD=
15、 4.5 V (tr, tf) 1 ns/V 4/ 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 300 rads (Si)/s) 1 x 106Rads (Si) Single event phenomenon (SEP): Effective linear energy transfer (LET), no upsets (see 4.4.4.4) 80 MeV/(mg/cm2) 6/ Effective linear energy transfer (LET), no latch-up (s
16、ee 4.4.4.4) 120 MeV/(mg/cm2) 6/ Dose rate upset (20 ns pulse) 1 x 109Rads (Si)/s Latch-up . None Dose rate survivability . 1 x 1012Rads (Si)/s _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance an
17、d affect reliability. 2/ Unless otherwise noted, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise noted. 4/ Derate system propagation delays by difference in
18、 rise time to switch point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit. 6/ Limits obtained during technology characterization/qualification, guaranteed by design or process, but not production tested unless specified by the customer through the purchase o
19、rder or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96533 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government sp
20、ecification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-
21、PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcirc
22、uit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following doc
23、ument(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradi
24、ation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P. O. Box C700, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the refer
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