DLA SMD-5962-95579 REV A-2001 MICROCIRCUT LINEAR ULTRAHIGH SPEED MULTIPLYING 12-BIT D A CONVERTER MONOLITHIC SILICON《超高速增加12-BIT直流电和交流电转换器硅单片电路线型微电路》.pdf

《DLA SMD-5962-95579 REV A-2001 MICROCIRCUT LINEAR ULTRAHIGH SPEED MULTIPLYING 12-BIT D A CONVERTER MONOLITHIC SILICON《超高速增加12-BIT直流电和交流电转换器硅单片电路线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95579 REV A-2001 MICROCIRCUT LINEAR ULTRAHIGH SPEED MULTIPLYING 12-BIT D A CONVERTER MONOLITHIC SILICON《超高速增加12-BIT直流电和交流电转换器硅单片电路线型微电路》.pdf（11页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. - ro 01-12-03 R. MONNIN REV SHET REV SHET REV A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY SANDRA ROONEY DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWIN

2、G CHECKED BY SANDRA ROONEY COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, ULTRAHIGH SPEED MULTIPLYING 12-BIT D/A CONVERTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-03-14 MON

3、OLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-95579 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E063-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

4、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space

5、application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 59

6、62 - 95579 01 M L X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified

7、 RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the c

8、ircuit function as follows: Device type Generic number Circuit function 01 AD668S 12-bit ultrahigh speed multiplying D/A converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements docume

9、ntation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and

10、 as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduc

11、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ VCCto REFCOM 0 V dc to +18 V dc VEE to REFCOM .0 V dc to

12、18 V dc REFCOM to LCOM .+100 mV dc to 10 V dc ACOM to LCOM 100 mV dc THCOM to LCOM .500 mV dc REFCOM to REFIN 18 V dc IBPOto LCOM .5 V dc IOUTto LCOM .-5 V dc to VTHDigital inputs to THCOM .-500 mV dc to +7.0 V dc REFIN1 to REFIN2 .36 V dc VTHto THCOM .-0.7 V dc to +1.4 V dc Logic threshold control

13、input current 5 mA Power dissipation (PD) .670 mW Storage temperature range -65C to +150C Junction temperature (TJ) .+175C Thermal resistance, junction-to-case (JC) +25C/W Thermal resistance, junction-to-ambient (JA) .+75C/W 1.4 Recommended operating conditions. Ambient operating temperature range (

14、TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue

15、of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method

16、Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for Resa

17、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit

18、Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event

19、 of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individu

20、al item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual i

21、tem requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein

22、for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and

23、 post irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test

24、 requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where mark

25、ing of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-385

26、35. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-

27、PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be req

28、uired from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device class

29、es Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appen

30、dix A shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL

31、A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Relative accuracy 2/ RA All bits with positive errors on, all bits with negative 1 01 -0.5 +0.5 LSB er

32、rors on 2,3 -0.75 +0.75 Differential 3/ nonlinearity DNL Major carry errors 1,2,3 01 -1.0 +1.0 LSB Gain error 2/ AEAll bits on 1 01 -1.0 +1.0 %FSR Gain temperature 3/ coefficient TCAEAll bits on 2,3 01 -40 +40 ppm/C Unipolar offset error 2/ VOSAll bits off 1 01 -0.2 +0.2 %FSR Unipolar offset TC 3/ T

33、CVOSAll bits off 2,3 01 -8.0 +8.0 ppm/C Bipolar offset error 2/ BPOEAll bits off, bipolar 1 01 -1.0 +1.0 %FSR Bipolar offset TC 3/ TCBPOEAll bits off, bipolar 2,3 01 -25 +25 ppm/C Bipolar zero error 2/ BPZEMSB on, all other bits off, bipolar 1 01 -0.5 +0.5 %FSR Bipolar zero TC 3/ TCBPZEMSB on, all o

34、ther bits off, bipolar 2,3 01 -20 +20 ppm/C Analog offset error 2/ AVOSAll bits on 1 01 -1.0 +1.0 % of VNOMAnalog offset TC 3/ TCAVOSAll bits on 2,3 01 -20 +20 ppm of VNOMOutput current IOUTUnipolar, all bits on 1 01 10.137 10.343 mA Bipolar, all bits on 5.017 5.223 Power supply rejection ratio PSRR

35、 VCC= +15 V 10%, +12 V 10%, 1 01 -0.05 +0.05 %FSR / V VEE= -15 V 10%, -12 V 10% See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH

36、IO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Power supply current ICC4/ All bits on 1 01 +32 mA IEE5/ -9 Dig

37、ital input high voltage VIH1,2,3 01 2.0 V Digital input low voltage VIL1,2,3 01 0.8 V Digital input high current IIHVIH= 2 V 1,2,3 01 -10 +10 A Digital input low current IILVIL= 0 V 1 01 -0.5 -100 A 2,3 -0.5 -200 1/ VCC= +15 V, VEE= -15 V, VIH= 2.0 V, VIL= 0.8 V, REFIN2 = +5 V in series with a 50 re

38、sistor, REFIN1 = GND. 2/ Measured in IOUTmode. 3/ Measured in VOUTmode. 4/ Guaranteed for +10.8 V VCC +16.5 V. 5/ Guaranteed for -10.8 V VEE -16.5 V. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acq

39、uired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Of

40、fshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 56 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduc

41、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline L Terminal number Terminal symbol 1 IN 1 (MSB) 2 IN 2 3 IN 3 4

42、 IN 4 5 IN 5 6 IN 6 7 IN 7 8 IN 8 9 IN 9 10 IN 10 11 IN 11 12 IN 12 (LSB) 13 THRESHOLD CONTROL (VTH) 14 THRESHOLD COMMON (THCOM) 15 VEE16 BIPOLAR OFFSET 17 LADDER COMMON (LCOM) 18 ANALOG COMMON (ACOM) 19 LOAD RESISTOR (RL) 20 IOUT21 REFERENCE INPUT 2 (REFIN 2) 22 REFERNCE INPUT 1 (REFIN 1) 23 REFERE

43、NCE COMMON (REFCOM) 24 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 8 DSCC FORM 2234

44、 APR 97 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the

45、form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qua

46、lification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD

47、-883. (1) Test condition A, B, C, D, or E. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation

48、, as applicable, in accordance with the intent specified in test method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in acco