DLA SMD-5962-93164 REV A-2002 MICROCIRCUIT LINEAR 12-BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON《硅单片 12位模拟数字转变器 线性微型电路》.pdf

《DLA SMD-5962-93164 REV A-2002 MICROCIRCUIT LINEAR 12-BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON《硅单片 12位模拟数字转变器 线性微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-93164 REV A-2002 MICROCIRCUIT LINEAR 12-BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON《硅单片 12位模拟数字转变器 线性微型电路》.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. - ro 02-03-07 R. MONNIN REV SHET REV A A A A A SHEET 15 16 17 18 19 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY SANDRA ROONEY DE

2、FENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY CHARLES E. BESORE COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, 12-BIT ANALOG TO DIGITAL CONVERTER, MONOLITHIC SILICON AND AGENCI

3、ES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-11-05 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-93164 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E217-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or

4、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high

5、reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. T

6、he PIN is as shown in the following example: 5962 - 93164 01 M X X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA

7、marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 De

8、vice type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 AD1674 12-Bit analog-to-digital converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device

9、 class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are

10、as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provide

11、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. (unless otherwise specified

12、, TA= +25C) VCCto digital common . +16.5 V VEEto digital common -16.5 V VLOGICto digital common . +7 V Analog common to digital common . 1.0 V Control inputs (CE, CS , AO, 12/ 8, R/C ) to digital common . -0.5 V to VLOGIC+0.5 V Analog inputs (REF IN, BIP OFF, 10 VIN) to analog common VEEto VCC20 VIN

13、to analog common . VEEto +24 V REF OUT . Indefinite short to common Momentary short to VCCPower dissipation (PD) 825 mW Storage temperature range . -65C to +150C Lead temperature (soldering 10 seconds) +300C Junction temperature (TJ) . +175C Thermal resistance, junction-to-case (JC) See MIL-STD-1835

14、 Thermal resistance, junction-to-ambient (JA) . 60C/W 1.4 Recommended operating conditions. Ambient operating temperature range (TA) -55C to 125C Operating voltage range: VCCto digital common . +11.4 V dc to +16.5 V dc VEEto digital common -11.4 V dc to -16.5 V dc VLOGICto digital common . +4.5 V dc

15、 to +5.5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of t

16、he Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Stan

17、dard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISIO

18、N LEVEL A SHEET 4 DSCC FORM 2234 APR 97 HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Docu

19、ment Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable la

20、ws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) pl

21、an. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and phys

22、ical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal co

23、nnections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics and post irradiation

24、 parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements sha

25、ll be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire

26、 SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for d

27、evice class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, append

28、ix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manu

29、facturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the r

30、equirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS CO

31、LUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C VCC= +15 V, VEE= -15 V, Group A subgroups Device type Limits Unit VLOGIC= +5 V unless otherwise specified Min Max Power dissipation PDThree-

32、stated outputs 1,2,3 01 575 mW Input resistance RIN10 V span, TA= +25C 1 01 3 7 k 20 V span, TA= +25C 6 14 Internal reference 2/ output voltage VREFBipolar 20 V span, 2.0 mA external load, TA= +25C 1 01 9.9 10.1 V Logic input high voltage ( CE, CS , R/ C, AO) VIH1,2,3 01 2.0 V Logic input high volta

33、ge ( CE, CS , R/ C, AO) VIL1,2,3 01 0.8 V Logic input current ( CE, CS , R/ C, AO) ILINVIH= 5.0 V, VIL= 0.0 V 1,2,3 01 -10 +10 A Logic output high voltage (DB11-DB0) VOHISOURCE= 500 A 1,2,3 01 2.4 V Logic output low voltage (DB11-DB0, STS) VOLISINK= 1.6 mA 1,2,3 01 0.4 V Three-state output leakage (

34、DB11-DB0) IOLTOutputs three-stated, VIH= 5.0 V 1,2,3 01 -10 +10 A Power supply current ILOGICOutputs three-stated, REF OUT to REF IN 1,2,3 01 8 mA ICCthrough 50 , VCC= 16.5 V, 14 IEEVEE= -16.5 V, VLOGIC= 5.5 V 18 Integral nonlinearity INL Major transitions, unipolar 10 V span, 1 01 -0.5 +0.5 LSB bip

35、olar 20 V span 2,3 -1.0 +1.0 Differential nonlinearity 3/ DNL All codes tested, unipolar 10 V span, bipolar 20 V span 1,2,3 01 12 Bits See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

36、 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C VCC= +15 V, VEE= -15 V, Group A subgroups Device type Limits Unit VLOGIC= +5 V unless

37、 otherwise specified Min Max Power supply rejection 4/ PSR Unipolar-10 V span 5/ 1,2,3 01 -1 +1 LSB 6/ -0.5 +0.5 7 -1 +1 Unipolar offset error VOSE10 V span, TA= +25C 1 01 -2 +2 LSB Unipolar offset drift TCVOS10 V span 2,3 01 -1 +1 LSB Bipolar offset error BPOE20 V span, TA= +25C 1 01 -3 +3 LSB Bipo

38、lar offset drift TCBPOE20 V span 2,3 01 -2 +2 LSB Full-scale calibration error ABBipolar 20 V span, TA= +25C 1 01 -0.125 +0.125 % of FSR AUUnipolar 10 V span, TA= +25C -0.125 +0.125 Full-scale calibration drift TCAEBipolar 20 V span 2,3 01 -7 +7 LSB Signal to noise and distortion S/(N+D) fIN= 10 kHz

39、, fSAMPLE= 100 kSPS 4,5,6 01 70 dB Total harmonic distortion THD fIN= 10 kHz, fSAMPLE= 100 kSPS 4,5,6 01 -82 dB Peak spurious or harmonic component fIN= 10 kHz, fSAMPLE= 100 kSPS 4,5,6 01 -82 dB Intermodulation 8/ distortion IMD Second order products 4,5,6 01 -80 dB Third order products -80 Function

40、al tests See 4.4.1b 7,8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 7 DSCC FORM 2234 AP

41、R 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C VCC= +15 V, VEE= -15 V, Group A subgroups Device type Limits Unit VLOGIC= +5 V unless otherwise specified Min Max Converter start timing section (see figure 4) Conversion time tC8-bit cycle 9,10,1

42、1 01 8 s 12-bits cycle 10 STS delay from CE tDSC9 01 200 ns 10,11 225 CE pulse width tHEC9,10,11 01 50 ns CS to CE setup tSSC9,10,11 01 50 ns CS low during CE high tHSC9,10,11 01 50 ns R/ C to CE setup tSRC9,10,11 01 50 ns R/ C low during CE high tHRC9,10,11 01 50 ns AOto CE setup tSAC9,10,11 01 0 n

43、s AOvalid during CE high tHAC9,10,11 01 50 ns Read timing full control mode section (see figure 5) Access time tDDSee figures 8 and 9 9,10,11 01 150 ns Data valid after CE low tHDSee figures 8 and 9 9 01 25 ns 10,11 15 Output float delay tHLSee figures 8 and 9 9,10,11 01 150 ns See footnotes at end

44、of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characte

45、ristics Continued. Test Symbol Conditions 1/ -55C TA +125C VCC= +15 V, VEE= -15 V, Group A subgroups Device type Limits Unit VLOGIC= +5 V unless otherwise specified Min Max Read timing full control mode section - continued (see figure 5) CS to CE setup tSSR9,10,11 01 50 ns R/ C to CE setup tSRR9,10,

46、11 01 0 ns AOto CE setup tSAR9,10,11 01 50 ns CS valid after CE low tHSR9,10,11 01 0 ns R/ C high after CE low tHRR9,10,11 01 0 ns AOvalid after CE low tHAR9,10,11 01 50 ns Read timing stand alone mode (see figures 6 and 7) Data access time tDDRSee figures 8 and 9 9,10,11 01 150 ns Low R/ C pulse wi

47、dth tHRL9,10,11 01 50 ns STS delay from R/ C tDS9 01 200 ns 10,11 225 Data valid after R/ C low tHDRSee figures 8 and 9 9,10,11 01 25 ns STS delay after data valid tHS9,10,11 01 0.6 1.2 s High R/ C pulse width tHRH9,10,11 01 150 ns See footnotes at end of table. Provided by IHSNot for ResaleNo repro

48、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93164 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ Unless otherwise specified, TMINto TMAX, VCC= +15 V 10% or +12 V 5%, VLOGIC= +5 V 10%, VEE= -15 V 10% or -12 V 5%; 12/8 connected to VLOGIC, AOand CS at logic “0“, CE at logic “1.“ 10 V unipolar-50 resistor REF OUT to REF IN, 50 resistor BIP OFF to g