DLA SMD-5962-93157 REV G-2002 MICROCIRCUIT MEMORY HYBRID AND MONOLITHIC DIGITAL STATIC RANDOM ACCESS MEMORY CMOS 256K X 8-BIT《256K X 8位静态随机存取存储器 氧化物半导体记忆混合及单片微型电路》.pdf

《DLA SMD-5962-93157 REV G-2002 MICROCIRCUIT MEMORY HYBRID AND MONOLITHIC DIGITAL STATIC RANDOM ACCESS MEMORY CMOS 256K X 8-BIT《256K X 8位静态随机存取存储器 氧化物半导体记忆混合及单片微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-93157 REV G-2002 MICROCIRCUIT MEMORY HYBRID AND MONOLITHIC DIGITAL STATIC RANDOM ACCESS MEMORY CMOS 256K X 8-BIT《256K X 8位静态随机存取存储器 氧化物半导体记忆混合及单片微型电路》.pdf（22页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Table I; Changed the max limit for ICCfor device types 06 through 09 from 150 mA to 180 mA. Changed the max limit for ICCDRfor device types 06 through 09 from 6.4 mA to 7.0 mA. -sld 98-06-22 K. A. Cottongim E Added cage code 0EU86 fro device type

2、s 05 through 08. Figure 1; case outline Y, changed dimension C (min) from 0.009 to 0.008 inches, dimension D (min) from 1.654 to 1.584 inches, dimension E (max) from 0.604 to 0.605 inches and dimension Q (max) from 0.047 to 0.060 inches. Added a monolithic block diagram to figure 6. -sld 99-11-01 Ra

3、ymond Monnin F Added note to paragraph 1.2.2 and table I to regarding the 4 transistor design. Added thermal resistance ratings for all case outlines to paragraph 1.3. Editorial changes throughout. -sld 00-07-11 Raymond Monnin G Table I; Change the min limit for tOHas follows: For device types 01-03

4、 change from 15 ns to 3 ns. For device type 04 change from 5 ns to 3 ns. For device types 05-09 change from 3 ns to 0 ns. -gjc 02-04-02 Raymond Monnin REV SHEET REV G G G G G G SHEET 15 16 17 18 19 20 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/

5、A PREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones POST OFFICE BOX 3990 COLUMBUS, OHIO 43216-5000 THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Kendall A. Cottongim MICROCIRCUIT, MEMORY, HYBRID AND MONOLITHIC, DIG

6、ITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 256K x 8-BIT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-04-01 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-93157 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E291-02 DISTRIBUTION STATEMENT A. Approved for public release; distribut

7、ion is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing

8、 documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the P

9、IN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 93157 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness as

10、surance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type 1/ Gener

11、ic number Circuit function Access time 01 WS256K8-120CQ SRAM, 256K x 8-bit 120 ns 02 WS256K8-100CQ SRAM, 256K x 8-bit 100 ns 03 WS256K8-85CQ SRAM, 256K x 8-bit 85 ns 04 WS256K8-70CQ SRAM, 256K x 8-bit 70 ns 05 WS256K8-55CQ, AS5C2008CW-55/HQ SRAM, 256K x 8-bit 55 ns 06 WS256K8-45CQ, AS5C2008CW-45/HQ

12、SRAM, 256K x 8-bit 45 ns 07 W2568K8-35CQ, AS5C2008CW-35/HQ SRAM, 256K x 8-bit 35 ns 08 WS256K8-25CQ, AS5C2008CW-25/HQ SRAM, 256K x 8-bit 25 ns 09 WS256K8-20CQ SRAM, 256K x 8-bit 20 ns 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assuran

13、ce level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class avai

14、lable. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H sc

15、reening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). 1/ Due to the nature of the 4 transistor design of the die in these devic

16、e types, topologically pure testing is important, particularly for high reliability applications. The device manufacturer should be consulted concerning their testing methods and algorithms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

17、CROCIRCUIT DRAWING SIZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature

18、 range. E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the excepti

19、on(s) taken will not adversely affect system performance. 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 32 Dual-in-line, dual cavity Y See figure 1 32 Dual-in-line, single

20、 cavity 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Signal voltage range (any pin). -0.5 V dc to +7.0 V dc Power dissipation (PD). 1 W Thermal resistance, junction- to case (JC): Case ou

21、tline X 6.40C/W Case outline Y 7.57C/W Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.5 V dc to +0.8 V dc Input high voltage range (VIH)

22、+2.2 V dc to VCC+0.3 V dc Output low voltage, maximum (VOL) +0.4 V dc Output high voltage, minimum (VOH) . +2.4 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handboo

23、ks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTME

24、NT OF DEFENSE MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction

25、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835

26、 - Interface Standard For Microcircuit Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs). MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the

27、 Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, sup

28、ersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the per

29、formance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. Therefore, the tests and inspections herein may not be performed for the applicable device class (see MIL-PRF-38534). Furthermore, the manufacturer

30、s may take exceptions or use alternate methods to the tests and inspections herein and not perform them. However, the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and ph

31、ysical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shal

32、l be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4 and 5. 3.2.5 Block diagram. The block diagram shall be as specified on figure 6. 3.2.6 Output load circuit. The output load circuit shall be as specified on figure 7. 3.3 Electrical perfo

33、rmance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified i

34、n table II. The electrical tests for each subgroup are described in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3

35、.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the

36、data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. Provided by IHSNot for ResaleN

37、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3.7 Certificate of compliance. A certificate of compliance shall be required fro

38、m a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required

39、 in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) p

40、lan. The modification in the QM plan shall not affect the form, fit, or function as described herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-

41、5000 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C VSS= 0 V dc +4.5 V dc VCC +5.5 V dc unless otherwise specified Group A subgroups Device types Min Max Unit DC PARAMETERS 01,02 03 04 05 70 80 90 130

42、Supply current ICCCS = VIL, OE = VIH, f = 5 MHz VCC = +5.5 V dc 1,2,3 06-09 180 mA 01,02 1.5 03 2.5 04 30 Standby current ISBCS = VCC, OE = VIH, f = 5 MHz VCC = +5.5 V dc 1,2,3 05-09 50 mA Input leakage current ILIVCC= +5.5 V dc, VIN= GND or VCC1,2,3 All 10 A Output leakage current ILOCS = VIH, OE =

43、 VIH, VOUT= GND to VCC, VCC = +5.5 V dc 1,2,3 All 10 A Input low voltage VIL 1,2,3 All 0.8 V Input high voltage VIH1,2,3 All 2.2 V Device types 01 through 05, IOL= +2.1 mA, VCC = +4.5 V dc Output low voltage VOLDevice types 06 trough 09, IOL= +8.0 mA, VCC = +4.5 V dc 1,2,3 All 0.4 V Device types 01

44、through 05, IOH= -1.0 mA, VCC = +4.5 V dc Output high voltage VOHDevice types 06 through 09, IOH= -4.0 mA, VCC = +4.5 V dc 1,2,3 All 2.4 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI

45、ZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C VSS= 0 V dc +4.5 V dc VCC +5.5 V dc unless otherwise specified Group

46、A subgroups Device types Min Max Unit DATA RETENTION Data retention supply voltage VDRCS VCC- 0.2 V dc 1,2,3 All 2.0 5.5 V 01-03 1.0 04 2.0 Data retention current ICCDRVCC= 3.0 V dc 1,2,3 05-09 7.0 mA CAPACITANCE Input capacitance 3/ CINVIN=0 V dc, f = 1 MHz 4 All 40 pF Output capacitance 3/ COUTVOU

47、T= 0 V dc, f = 1 MHz 4 All 40 pF FUNCTIONAL TESTING Functional tests See 4.3.1c 7,8A,8B All READ CYCLE AC TIMING Read cycle time tRCSee figure 4 9,10,11 01 02 03 04 05 06 07 08 09 120 100 85 70 55 45 35 25 20 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networkin

48、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93157 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C VSS= 0 V dc +4.5 V dc VCC +5.5 V dc unless otherwise specified Group A subgroups Device types Min Max Unit READ CYC