DLA SMD-5962-91753 REV A-2004 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUFFER WITH ACTIVE LOW ENABLE THREE-STATE NON-INVERTED OUTPUTS MONOLITHIC SILICON《硅单块 带有源低允许三.pdf

《DLA SMD-5962-91753 REV A-2004 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUFFER WITH ACTIVE LOW ENABLE THREE-STATE NON-INVERTED OUTPUTS MONOLITHIC SILICON《硅单块 带有源低允许三.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-91753 REV A-2004 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUFFER WITH ACTIVE LOW ENABLE THREE-STATE NON-INVERTED OUTPUTS MONOLITHIC SILICON《硅单块 带有源低允许三.pdf（12页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 04-09-15 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SH

2、EET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT,

3、DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, OCTAL BUFFER WITH ACTIVE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-10-30 LOW ENABLE THREE-STATE NON-INVERTED OUTPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-91753 SHEET 1 OF 11 DSCC FORM 2233 APR 97

4、5962-E431-04 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing docu

5、ments two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness

6、 Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91753 01 M R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawi

7、ng number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA

8、designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 54F541 Octal buffer with active low enabled three-state non-inverted outputs 1.2.3 Device class designator. The device clas

9、s designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certif

10、ication and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 dual-in-line S GDFP2-F20 or CDFP3-F20 20 flat 2 CQCC1-N20 20 square chip carri

11、er 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE

12、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V to +7.0 V DC input voltage . 1.2 V at 18 mA to +7.0 V DC input current -30 mA to +5.0 mA Voltage applied to a disabled three-state outpu

13、t . 0.5 V to +5.5 V Voltage applied to any output in the high state -0.5 V to VCCCurrent into any output in the low state . 96 mA Storage temperature range -65C to +150C Maximum power dissipation (PD) . 412.5 mW 2/ Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +175C Therma

14、l resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V to +5.5 V Minimum high level input voltage (VIH) +2.0 V Maximum low level input voltage (VIL) 0.8 V Maximum input clamp current (IIK) -18 mA Maximum high level output current (IOH

15、) . -12 mA Maximum low level output current (IOL) +48 mA Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified her

16、ein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microc

17、ircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearc

18、h/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. N

19、othing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliabilit

20、y. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit output test e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER C

21、OLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Man

22、agement (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, constru

23、ction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.

24、3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3 3.2.5 Test circuit and switching waveforms. The test circuit and swit

25、ching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table I and shall apply over th

26、e full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In additio

27、n, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Markin

28、g for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The c

29、ompliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 h

30、erein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing

31、 shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q

32、and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acq

33、uired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documen

34、tation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 09 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networ

35、king permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise s

36、pecified Group A subgroups Device type Limits Unit Min Max Output high voltage VOHVCC= 4.5 V, IOH = -3 mA 1, 2, 3 All 2.4 V VIH= 2.0 V, 1/ IOH = -12 mA 2.0 Output low voltage VOLVIL= 0.8 V IOL = 48 mA 1, 2, 3 All 0.55 V Input clamp voltage VICVCC= 4.5 V IIN = -18 mA 1, 2, 3 All -1.2 V High level inp

37、ut current IIH1VCC= 5.5 V VIN= 7.0 V 1, 2, 3 All 100 A IIH2VIN= 2.7 V 30 Low level input current IIL VCC= 5.5 V VIN= 0.5 V -0.6 mA Short-circuit output current IOSVCC= 5.5 V, 2/ VOUT= 0.0 V 1, 2, 3 All -100 -225 mA Supply current ICCHVCC= 5.5 V Outputs high 1, 2, 3 All 35 mA ICCLOutputs low 75 CCZOu

38、tputs disabled 55 Off-state output leakage IOZHVCC= 5.5 V VOUT= 2.7 V 1, 2, 3 All 50 A current IOZLVOUT= 0.5 V -50 Functional tests See 4.4.1b, VCC= 4.5 and 5.5 V 7, 8 All Propagation delay time, tPLHCL= 50 pF, VCC= 5.0 V 9 All 1.0 5.5 ns from any A to Y RL= 500, VCC = 4.5 V, 5.5 V 10, 11 1.0 6.5 tP

39、HLSee figure 4. VCC= 5.0 V 9 All 1.0 5.5 ns 3/ VCC= 4.5 V, 5.5 V 10, 11 1.0 6.5 Output enable time, tPZHVCC= 5.0 V 9 All 2.2 8.0 ns from G1 or G 2 to Y CC= 4.5 V, 5.5 V 10, 11 1.7 10 tPZLVCC= 5.0 V 9 All 2.2 8.5 ns CC= 4.5 V, 5.5 V 10, 11 2.2 10 Output disable time, tPHZVCC= 5.0 V 9 All 1.0 6.0 ns f

40、rom G1 or G 2 to Y CC= 4.5 V, 5.5 V 10, 11 1.0 7.0 tPLZVCC= 5.0 V 9 All 1.0 5.5 ns CC= 4.5 V, 5.5 V 10, 11 1.0 7.5 1/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper state, the test must be performed with each input being selected as the V

41、ILmaximum or VIHminimum input. 2/ Not more than one output will be tested at one time and duration of the test condition shall not exceed one second. 3/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or netw

42、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines R, S, and 2 Terminal number Terminal symbol 1 G1 2 A1 3 A2 4 A3 5 A4 6 A5

43、 7 A6 8 A7 9 A8 10 GND 11 Y8 12 Y7 13 Y6 14 Y5 15 Y4 16 Y3 17 Y2 18 Y1 19 G2 20 VCCFIGURE 1. Terminal connections. Inputs Output G1 G2 A Y L L L L L L H H H X X Z X H X ZH = High voltage level. L = Low voltage level. Z = High impedance. X = Irrelevant. FIGURE 2. Truth table. Provided by IHSNot for R

44、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or n

45、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characterist

46、ics: PRR = 1 MHz, tr= tf= 2.5 ns, duty cycle = 50%. 3. When measuring propagation delay times of three-state outputs, switch S1 is open. 4. The outputs are measured one at a time with one transition per measurement. 5. Waveform 1 is for an output with internal conditions such that the output is low

47、except when disabled by the output control. 6. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

48、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shal