DLA SMD-5962-90715 REV C-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 4K X 9 FIFO MONOLITHIC SILICON.pdf
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1、REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. Editorial changes throughout. - gap 01-02-12 Raymond Monnin B Boilerplate update and part of five year review. tcr 07-01-31 Joseph Rodenbeck C Update drawing to meet current MIL-PRF-38535 requiremen
2、ts. glg 13-07-25 Charles Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Jamison DLA LAND
3、AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Wm J. Johnson COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 4K X 9 FIFO, MONOLITHIC SILICON AND AGENCIES OF THE DEP
4、ARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-08-04 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90715 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E508-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9
5、0715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines
6、and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90715 01 M X A Federal stock class designator RHA d
7、esignator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA de
8、signator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number
9、 Circuit function Access time 01 7C432, 7C433 4K X 9 FIFO 120 ns 02 7C432, 7C433 4K X 9 FIFO 80 ns 03 7C432, 7C433 4K X 9 FIFO 65 ns 04 7C432, 7C433 4K X 9 FIFO 50 ns 05 7C432, 7C433 4K X 9 FIFO 40 ns 06 7C432, 7C433 4K X 9 FIFO 30 ns 07 7C433 4K X 9 FIFO 20 ns 1.2.3 Device class designator. The dev
10、ice class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or
11、V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style U CDIP3-T28 or GDIP4-T28 28 Dual-in-line X GDIP1-T28 or CDIP2-T28 28 Dual-in-line Y GDFP2-F28
12、28 Flat pack Z CQCC1-N32 32 Rectangular leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-
13、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range to ground potential (VCC) . -0.5 V dc to +7.0 V dc DC voltage range applied to outputs in high-Z st
14、ate -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+.5 V dc DC output current . 20 mA Maximum power dissipation . 1.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +175C Storage temperatur
15、e range (TSTG) . -65C to +150C Temperature under bias range . -55C to +125C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND) . 0 V dc Input high voltage (VIH) 2.2 V dc minimum 2/ Input low voltage (VIL) 0.8 V dc maximum Case
16、 operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these document
17、s are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Compone
18、nt Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Bu
19、ilding 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ VIHis 2.2 V minimum for all input pins except XI which is 3.5 V minimum. Prov
20、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a
21、 part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Applications for copies should b
22、e addressed to JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S, Arlington, VA 22201-2107; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also m
23、ay be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and
24、 regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. Th
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