DLA SMD-5962-90687 REV D-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE WITH TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-90687 REV D-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE WITH TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-90687 REV D-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE WITH TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(17页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make corrections to figure 4 jak. 00-10-24 Thomas M. Hess B Make change to footnote 9/ in table I. Add vendor CAGE F8859. Add case outline X. Add device type 02. Add table III, delta limits. Update drawing to MIL-PRF-38535 requirements. - jak 03-
2、02-12 Thomas M. Hess C Add section 1.5, radiation features. Update the boilerplate to include radiation hardness assured requirements. Editorial changes throughout. - jak 04-02-25 Thomas M. Hess D Update radiation features in section 1.5. Add SEP test table IB and paragraph 4.4.4.2. jak 11-04-08 Dav
3、id J.Corbett REV SHEET REV D D SHEET 15 16 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen
4、THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE WITH TTL DRAWING APPROVAL DATE 96-03-07 COMPATIBLE INPUTS, MONOLITHIC SILICON REVISION LEVEL D SIZE
5、A CAGE CODE 67268 5962-90687 AMSC N/A SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E152-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHE
6、ET2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifyi
7、ng Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 90687 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (se
8、e 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendi
9、x A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT86 Quadruple 2-input exclusive-OR gate with TTL c
10、ompatible inputs. 02 54ACT86 Quadruple 2-input exclusive-OR gate with TTL compatible inputs. 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issu
11、ance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance w
12、ith MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDF
13、P2-F14 14 Flat pack X CDFP3-F14 14 Flat pack2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted
14、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHEET3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc t
15、o VCC + 0.5 V dc 4/ DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc 4/ Input clamp current (IIK) (VINVCC) . 20 mA Output clamp current (IOK) (VOUTVCC) 20 mA Continuous output current (IOUT) (VOUT 0.0 V to VCC) 50 mA Continuous current through VCCor GND . 200 mA Maximum power dissipation
16、(PD) 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): device type 01 +300C device type 02 +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage r
17、ange (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCMinimum high level input voltage (VIH) . +2.0 V Maximum low level input voltage (VIL) +0.8 V Maximum high level output current (IOH) -24 mA Maximum low level output current (IOL)
18、 +24 mA Input transition rise or fall rate (t/V) 0 to 8 ns Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Device type 02: Maximum total dose available (dose rate = 50 300 rads(Si)/s) . 300 krads (Si) effective LET, no SEL (see 4.4.4.2) . 93 MeV-cm2/mg 5/ effective LET,
19、 no SEU (see 4.4.4.2) 93 MeV-cm2/mg 5/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the
20、 parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ The input and output negative voltage ratings may be exceeded provided that the input and output clamp current ratings are observed. 5/ These limits were obtained during technolo
21、gy characterization and qualification, and are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D
22、RAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHEET4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specif
23、ied herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits,
24、Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Stan
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