DLA SMD-5962-90528 REV C-2006 MICROCIRCUIT DIGITAL INTERFACE TRANSPARENT ASYNCHRONOUS RECEIVER MONOLITHIC SILICON《硅单片 透明异步接收器接口 数字微型电路》.pdf

《DLA SMD-5962-90528 REV C-2006 MICROCIRCUIT DIGITAL INTERFACE TRANSPARENT ASYNCHRONOUS RECEIVER MONOLITHIC SILICON《硅单片 透明异步接收器接口 数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-90528 REV C-2006 MICROCIRCUIT DIGITAL INTERFACE TRANSPARENT ASYNCHRONOUS RECEIVER MONOLITHIC SILICON《硅单片 透明异步接收器接口 数字微型电路》.pdf（25页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R049-98. 98-03-06 Monica L. Poelking B Changes in accordance with NOR 5962-R125-98. 98-06-19 Monica L. Poelking C Update boilerplate to MIL-PRF-38535 requirements. Incorporate previous Notices of Revisions (NOR

2、s). - CFS 06-01-26 Thomas M. Hess REV SHET REV C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CH

3、ECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, INTERFACE, TRANSPARENT ASYNCHRONOUS RECEIVER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-02-23 MONOL

4、ITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90528 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E020-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90528 DEFENSE SUPPLY CENTER COLUMBUS

5、COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are avail

6、able and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90528 01 Q X X Federal stock class designator RHA designator (see 1.2.1) Device

7、 type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA m

8、arked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 7969-125V

9、 1/ Transparent asynchronous receiver interface 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant,

10、non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-

11、T28 or CDIP2-T28 28 Dual-in-line 3 CQCC2-N28 28 Square leadless chip carrier 7 See figure 1. 28 J leaded chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ The cascade mode of this device d

12、oes not work. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90528 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Sup

13、ply voltage range (VCC) to ground potential continuous -0.5 V dc to +7.0 V dc DC voltage range applied to outputs. -0.5 V dc to VCCmaximum DC input voltage range (VIN). -0.5 V dc to + 5.5 V dc DC output current . 100 mA DC input current . -30 mA to +5.0 mA Storage temperature range. -65C to +150C Ma

14、ximum power dissipation (PD) 2.6 W 2/ Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC): Case outlines X and 3. See MIL-STD-1835 Case outline 7 . 20C/W Maximum junction temperature (TJ) +155C 1.4 Recommended operating conditions. Supply voltage range (VCC). +

15、4.75 V dc to +5.5 V dc Minimum high-level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.8 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and hand

16、books form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT O

17、F DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents

18、 are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the re

19、ferences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation

20、at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added PDdue to short circuit test, e.g., ISC. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90528 DEFENSE SUPPLY C

21、ENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Qual

22、ity Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design,

23、construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 h

24、erein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth tables. The truth tables shall be as specified on figure 3. 3.2.4 Functional block/logic diagram. The functional block/logic diagram shall be as specified on figure 4. 3.2.5 Swi

25、tching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter

26、limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part sha

27、ll be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using thi

28、s option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V s

29、hall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order

30、to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior t

31、o listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A ce

32、rtificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA o

33、f change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facili

34、ty and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 104 (see MIL-PRF-38535, appendix

35、 A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90528 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristi

36、cs. 3 Limits Test Symbol Conditions 1/ -55C TC+125C 4.75 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit Bus interface signals: DO0-DO7, DO8/CO3, DO9/CO2, CO0-CO1, DSTRB, CSTRB, IGM, CLK, CNB, VLTN Output high voltage VOHVCC= 4.75 V, IOH= -1 mA, VIN= 0.0 V or 3.0 V

37、2.4 V Output low voltage VOLVCC= 4.75 V, IOL= 8 mA, VIN= 0.0 V or 3.0 V 0.45 V Input high voltage VIHVCC= 5.5 V 2/ 2.0 Input low voltage VILVCC= 5.5 V 2/ 0.8 V Input clamp voltage VIVCC= 4.75 V, IIN= -18 mA -1.5 V Input low current IILVCC= 5.5 V, VIN= 0.4 V -400 A Input high current IIHVCC= 5.5 V, V

38、IN= 2.7 V 50 A Input leakage current IIVCC= 5.5 V, VIN= 5.5 V 50 A Output short circuit current ISC3/ 1, 2, 3 All -15 -85 mA Serial interface signals: SERIN+, SERIN- Input high voltage SERIN+ VIHS2/ 4/ VCC 1.165 VCC 0.88 V Input low voltage SERIN+ VILS2/ 4/ VCC 1.81 VCC 1.475 V Test mode threshold S

39、ERIN- VTHTVCC= 5.5 V 7, 8 0.25 V Differential input voltage SERIN+ VDIF0.3 1.1 V Input common mode voltage VICM5/ 3.05 VCC 0.55 V Input low current IILVCC= 5.5 V, VIN= VCC- 1.81 V 0.5 A Input high current IIHVCC= 5.5 V, VIN= VCC- 0.88 V 1, 2, 3 All 220 A See footnotes at end of table. Provided by IH

40、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90528 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Lim

41、its Test Symbol Conditions 1/ -55C TC+125C 4.75 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Min Max Unit Miscellaneous signals: X1, VCC1, VCC2Input high voltage X1VIHX2.0 V Input low voltage X1VILX1, 2, 3 0.8 V 1, 2 -900 Input low current X1IILXVIN= 0.45 V 3 -1100 A Input hig

42、h current X1IIHXVIN= 2.4 V +600 A pin VCC1 (TTL) 55 Supply current ICCDMS = 0, VCC1= VCC2= 5.5 V pin VCC2 (CML)1, 2, 3 All 335 mA Bus interface signals: DO0-DO7, DO8/CO3, DO9/CO2, CO0-CO1, DSTRB, CSTRB, IGM, CLK, CNB, VLTN 6/ CLK period 7/ t35See figure 5. 8/ 8n 25n ns Data valid to STRB delay t362t

43、35/n ns CLK to STRB t37(2t35/n) + 15 ns CLK to STRB t38(t35/n) - 7 ns STRB to CLK 9/ t38a(3t35/n) - 14 ns CLK to data valid delay t39-(t35/n) + 23 ns STRB pulse width high t405t35/2n 5t35/n ns CLK pulse width high t41 35/n - 15 ns CLK pulse width low t425t35/2n - 15 ns SERIN to CLK delay t43TTL outp

44、ut load See figure 5. 8/ 9, 10, 11 All t35/2n + 17 2t35/n + 26 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90528 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

45、REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC+125C 4.75 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Min Max Unit Serial interface signals: SERIN+, SERIN- SERIN peak to peak

46、input jitter tolerance t57See figure 5. 10/ 11/ 9, 10, 11 All 5 ns Miscellaneous signals: X112/ X1pulse width high t6035 ns X1pulse width low t61See figure 5. 4/ 9, 10, 11 All 35 ns 1/ Unless otherwise specified, for dc test parameters, all test conditions shall be worst case conditions; VIH= 2.0 V

47、and VIL= 0.8 V. For ac test parameters, all tests are performed using the input waveforms shown in figure 5. The following conditions also apply: All timing references are made with respect to +1.5 V for TTL-level signals or to the 50 percent point between VOHand VOLfor ECL signals. ECL input rise a

48、nd fall times must be 2 ns 0.2 ns between 20 percent and 80 percent points. TTL input rise and fall times must be 2 ns 0.2 ns between 1 V and 2 V. 2/ Measured with device in test mode while monitoring output logic states. 3/ Not more than one output should be shorted at a time. Duration of the short circuit test should not exceed one second. 4/ Device thresholds on the SERIN(+/-) pin(s) are verified during production test by ensuring that the input threshold is less than VIHS(min) and greater than VILS(max). The figure below shows the acceptab