DLA SMD-5962-90526 REV N-2008 MICROCIRCUIT DIGITAL CMOS DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON.pdf
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1、REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R060-92 91-11-25 M. L. Poelking B Changes in accordance with NOR 5962-R006-93 92-11-05 M. L. Poelking C Add device type 03. Update boilerplate. Editorial changes throughout. 92-12-10 M. L. Poelking D Add device
2、type 04. Update boilerplate. Editorial changes throughout. 96-07-09 M. L. Poelking E Add case outlines T and M. Changes to boilerplate. Editorial changes throughout. 96-10-03 M. L. Poelking F Changes in accordance with NOR 5962-R296-97. 97-06-06 M. L. Poelking G Add device type 05. Editorial changes
3、 throughout. - LTG 97-12-01 M. L. Poelking H Changes in accordance with NOR 5962-R103-98 98-05-06 M. L. Poelking J Changes in accordance with NOR 5962-R171-98 98-10-22 M. L. Poelking K Changes in accordance with NOR 5962-R002-00 99-11-15 M. L. Poelking L Incorporate revisions H, J, and K. Add paragr
4、aph 6.7, application note, to document. Update boilerplate to MIL-PRF-38535 requirements. LTG 02-06-17 Thomas M. Hess M Update die dimensions and bond pad coordinates due to die shrink. Update boilerplate to current MIL-PRF-38535 requirements. CFS 04-08-27 Thomas M. Hess N Update boilerplate to curr
5、ent MIL-PRF-38535 requirements. CFS 08-11-17 Thomas M. Hess REV N N N N SHEET 55 56 57 58 REV N N N N N N N N N N N N N N N N N N N N SHEET 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 REV N N N N N N N N N N N N N N N N N N N N SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
6、 32 33 34 REV STATUS REV N N N N N N N N N N N N N N OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABL
7、E FOR USE BY ALL DEPARTMENTS APPROVED BY Don M. Cool MICROCIRCUIT, DIGITAL, CMOS, DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-09-13 AMSC N/A REVISION LEVEL N SIZE A CAGE CODE 67268 5962-90526 SHEET 1 OF 58 DSCC FORM 2233 APR 97 5962
8、-E039-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL N SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing document
9、s two product assurance class levels consisting of high reliability (device classes Q and M) and appendix F of MIL-PRF-38535, “General provisions for TAB microcircuits” and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
10、Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90526 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designat
11、orCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535,
12、appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 320C30 Digital signal processor, 28 MHz 02 320C
13、30 Digital signal processor, 25 MHz 03 320C30 Digital signal processor, 33 MHz 04 320C30 Digital signal processor, 40 MHz 05 320C30 Digital signal processor, 50 MHz 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Devic
14、e class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A and appendix F of MIL-PRF-38535 Q or V Certification and qualification to MIL-PRF-38535 and appendix F
15、 of MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style U See figure 1 196 Quad flat pack with non-conductive tiebar X CMGA7-P181 181 Pin grid array Y 1/ See figure 1 196 Leadless chi
16、p carrier Z 1/ See figure 1 196 Quad flat package T See figure 1 203 Environmentally protected tape automated bond M See figure 1 196 Tape automated bond _ 1/ Not available from an approved source of supply. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
17、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL N SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 and appendix F of MIL-PRF-38535 for device classes Q and V or MIL-PRF-3853
18、5, appendix A and appendix F of MIL-PRF-38535 for device class M. 1.3 Absolute maximum ratings. 2/ Supply voltage range (VDD) 3/ . -0.3 V dc to 7.0 V dc Input voltage range . -0.3 V dc to 7.0 V dc Output voltage range . -0.3 V dc to 7.0 V dc Continuous power dissipation 4/ 3.15 W Storage temperature
19、 range . -55C to +150C Junction temperature (TJ) Case outlines X and U: Device types 03, 04, and 05 +150C Junction temperature (TJ) Case outlines T and M: Device type 03 +125C Thermal resistance, junction to case (JC): Case X See MIL-STD-1835 Case U 1.5C/W Maximum die temperature rise for the die at
20、 100%: Cases T and M 0.09C/W Thermal resistance, junction to ambient (JA): Case U 29C/W 1.4 Recommended operating conditions. Supply voltages (VDD): Device type 01, 04 and 05 . 4.75 V dc min to 5.25 V dc max Device type 02 and 03 . 4.5 V dc min to 5.5 V dc max Supply voltages (CVSS, etc.) (VSS) . 0
21、V dc nominal High level input voltage (VIH): 5/ Except CLKX0 and CLKX1 2.1 V dc min to VDD+0.3 V dc max High level input voltage (VIH): 5/ Pins CLKX0 and CLKX1 2.2 V dc min to VDD+0.3 V dc max Low level input voltage (VIL) 5/ . -0.3 V dc min to 0.8 V dc max High level output current (IOH) . -300 A m
22、ax Low level output current (IOL) . 2 mA max CLKIN high level input voltage (VTH) 5/ 3.0 V dc min to VDD+0.3 V dc max Operating case temperature (TC) -55C min to +125C max _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum leve
23、ls may degrade performance and affect reliability. 3/ All voltage values are with respect to VSS. 4/ Actual operating power will be less. This value was obtained under specially produced worst-case test conditions, which are not sustained during normal device operation. These conditions consist of c
24、ontinuous parallel writes of a checkerboard pattern to both primary and expansion buses at the maximum rate possible. 5/ VIHmax, VILmin, and VTHmax are guaranteed from characterization but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S
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