DLA SMD-5962-89942 REV B-2011 MICROCIRCUITS MEMORY DIGITAL CMOS 2K X 9 PARALLEL-SERIAL FIFO MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 05. Add footnote reference 1/ to Table I. Changes on figure 4. Editorial changes throughout. 93-01-13 M.A. Frye B Update body of drawing to reflect current requirements. glg 11-02-23 Charles Saffle THE ORIGINAL FIRST SHEET OF THIS

2、 DRAWING HAS BEEN REPLACED. REV B B B B SHEET 35 36 37 38 REV B B B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LA

3、ND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUITS, MEMORY, DIGITAL, CMOS, 2K X 9 PARALLEL-SERIAL FIFO, MONOLITHIC SILICON AND AGENCIES

4、 OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-11-09 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89942 SHEET 1 OF 38 DSCC FORM 2233 APR 97 5962-E255-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

5、IZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Iden

6、tifying Number (PIN). The complete PIN is as shown in the following example: 5962-89942 01 X X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit fu

7、nction Shift Rate 01 72103L 2K X 9-bit parallel-serial FIFO 120 ns 02 72103L 2K X 9-bit parallel-serial FIFO 80 ns 03 72103L 2K X 9-bit parallel-serial FIFO 65 ns 04 72103L 2K X 9-bit parallel-serial FIFO 50 ns 05 72103L 2K X 9-bit parallel-serial FIFO 40 ns 1.2.2 Case outline(s). The case outline(s

8、) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line X CQCC1-N44 44 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum

9、 ratings. Terminal voltage with respect to ground . -0.5 V dc to +7.0 V dc DC output current . 50 mA Storage temperature range . -65C to +150C Maximum power dissipation . 1.0 W Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction to case(JC): See MIL-STD-1835 Junction temper

10、ature (TJ) . +150C 1/ 1.4 Recommended operating conditions. Supply voltage range(VCC) . +4.5 V dc to +5.5 V dc Input high voltage (VIH) . 2.2 V dc minimum Input low voltage (VIL) . 0.8 V dc maximum 2/ Case operating temperature range (TC) -55C to +125C. 1/ Maximum junction temperature may be increas

11、ed to +175C during burn-in and steady-state life tests. 2/ 1.5 V undershoots are allowed for 10 ns once per cycle. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43

12、218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these do

13、cuments are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic C

14、omponent Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 70

15、0 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations

16、unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufa

17、cturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. T

18、his QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordan

19、ce with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections sha

20、ll be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteris

21、tics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for Re

22、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions Device Group

23、 A Limits Unit -55C VIH All 1,2,3 -10 10 A Output low voltage VOLVCC= 4.5 V, SO, IOUT= 16 mA All 1,2,3 0.4 V VIL= 0.8 V, VIH= 2.2 V All other outputs, 0.4 IOUT= 8.0 mA Output high voltage VOHVCC= 4.5 V, SO, All 1,2,3 2.4 V VIL= 0.8 V, IOUT= -8.0 mA VIH= 2.2 V All other outputs, 2.4 IOUT= -2.0 mA Pow

24、er supply current ICC1f = fS, outputs open, VCC= 5.5 V All 1,2,3 160 mA Average standby current ICC2R = W = RS = FL/RT = VIH, All 1,2,3 25 mA outputs open Power down current ICC3RS = FL/RT = W = R = All 1,2,3 4.0 mA VCC- 0.2 V, all other inputs VCC- 0.2 V or 0.2 V, outputs open Input capacitance CIN

25、VI= 0 V, f = 1.0 MHz, All 4 10 pF TA= +25C, see 4.3.1c Output capacitance COUTVO= 0 V, f = 1.0 MHz, All 4 12 pF TA= +25C, see 4.3.1c See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5

26、962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise spec

27、ified Parallel I/O shift frequency fSCL= 30 pF, see figures 3 and 4 01 9,10,11 7.0 MHz 02 10 03 12.5 04 15 05 20 Serial-out shift frequency fSOCP 01 9,10,11 25 MHz 02 28 03 33 04 40 05 50 Serial-in shift frequency fSICP 01 9,10,11 25 MHz 02 28 03 33 04 40 05 50 PARALLEL OUTPUT MODE TIMINGS Access ti

28、me tACL= 30 pF, see figures 3 and 4 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-39

29、90 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified Read recovery time tRR 01,02 9,10,11 20 ns CL= 30

30、 pF, see figures 3 and 4 03,04 15 05 10 Read pulse width tRPW 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 Read cycle time tRC 01 9,10,11 140 ns 02 100 03 80 04 65 05 50 Write pulse low to data tWLZ 01,02 9,10,11 20 ns bus at low Z 1/ 03,04 15 05 5 Read pulse low to data tRLZ 01,02, 9,10,11 10 ns bus a

31、t low Z 1/ 03,04 05 5 Read pulse high to data tRHZ 01,02 9,10,11 35 ns bus at high Z 1/ 03,04 30 05 25 Data valid from read tDV All 9,10,11 5.0 ns pulse high See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICR

32、OCIRCUIT DRAWING SIZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min

33、Max unless otherwise specified PARALLEL INPUT MODE TIMINGS Data setup time tDSCL= 30 pF, see figures 3 and 4 01,02 9,10,11 40 ns 03,04 30 05 20 Data hold time tDH 01,02, 9,10,11 10 ns 03 04 5.0 05 0 Write cycle time tWC 01 9,10,11 140 ns 02 100 03 80 04 65 05 50 Write pulse width tWPW 01 9,10,11 120

34、 ns 02 80 03 65 04 50 05 40 Write recovery time tWR 01,02 9,10,11 20 ns 03,04 15 05 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO

35、 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified RESET TIMINGS Reset cycle time tRSCCL= 3

36、0 pF, see figures 3 and 4 01 9,10,11 140 ns 02 100 03 80 04 65 05 50 Reset pulse width tRS 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 Reset setup time 1/ tRSS 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 Reset recovery time tRSR 01,02 9,10,11 20 ns 03,04 15 05 10 See footnotes at end of table. Provided

37、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89942 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified RESET TO FLAGS DELAYS Reset to EF, AEF, and tRSF1CL= 30 pF, see figures 3 and 4 01 9,10,11 140 ns EF+1 low 02 100