DLA SMD-5962-89863 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS PARALLEL 512 X 9 FIFO MONOLITHIC SILICON《硅单片 512 X 9先进先出式串联 高速氧化物半导体数字记忆微型电路》.pdf

《DLA SMD-5962-89863 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS PARALLEL 512 X 9 FIFO MONOLITHIC SILICON《硅单片 512 X 9先进先出式串联 高速氧化物半导体数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89863 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS PARALLEL 512 X 9 FIFO MONOLITHIC SILICON《硅单片 512 X 9先进先出式串联 高速氧化物半导体数字记忆微型电路》.pdf（22页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update, part of 5 year review. ksr 06-11-08 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV A A A A A A SHEET 15 16 17 18 19 20 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4

2、 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Jamison DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF TH

3、E DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-09-17 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO , MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89863 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E011-07 .Provided by IHSNot for ResaleNo reproduction or network

4、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class l

5、evel B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89863 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type

6、(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Acess time 01 512 X 9 FIFO 80 ns 02 512 X 9 FIFO 65 ns 03 512 X 9 FIFO 50 ns 04 512 X 9 FIFO 40 ns 05 512 X 9 FIFO 30 ns 06 512 X 9 FIFO 25 ns 1.2.2 Case outline(s). The case outline(s) are as designated in

7、MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 dual-in-line package Y CDIP3-T28 or GDIP4-T28 28 dual-in-line package Z CQCC1-N32 32 rectangular chip carrier package U GDFP2-F28 28 flat package 1.2.3 Lead finish. The lead finish

8、is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage to ground potential - -0.5 V dc to +7.0 V dc DC voltage applied to outputs in high Z state - -0.5 V dc to +7.0 V dc DC input voltage - -0.3 V dc to +7.0 V dc DC output current - 20 mA Maximum power dissipation

9、 2/ - 1.0 W Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC) - See MIL-STD-1835 Junction temperature (TJ) 3/ - +150C Storage temperature range - -65C to +150C Temperature under bias - -55C to +125C 1.4 Recommended operating conditions. Supply voltage (VCC)-

10、+4.5 V dc to +5.5 V dc Ground voltage (GND) - 0 V dc Input high voltage (VIH) - 2.2 V dc minimum Input low voltage (VIL) - 0.8 V dc maximum Case operating temperature range (TC) - -55C to +125C 1/ Generic numbers are listed on the Standardized Military Drawing Source Approval Bulletin at the end of

11、this document and will also be listed in MIL-HDBK-103. 2/ Must withstand the added PDdue to short circuit test (e.g., IOS). 3/ Maximum junction temperature may be increased to +175C during burn-in and steady-state life. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

12、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbo

13、oks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF

14、DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents a

15、re available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the refe

16、rences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-385

17、35, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed

18、as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, f

19、it, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, a

20、nd physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accor

21、dance with 1.2.2 herein. 3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture conte

22、nt test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any ti

23、me after seal. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shal

24、l be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4

25、3218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ -55C TA+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit Output high voltage VOHVCC= 4.5 V, IOH= -2.0 mA VIN= VIH, VIL1

26、, 2, 3 All 2.4 V Output low voltage VOLVCC= 4.5 V, IOH= 8.0 mA VIN= VIH, VIL1, 2, 3 All 0.4 V Input high voltage VIH2/ 1, 2, 3 All 2.2 V Input low voltage VIL2/ 1, 2, 3 All 0.8 V Input leakage current IIXVIN= 5.5 V to GND 1, 2, 3 All -10 +10 A Output leakage current IOZVCC= 5.5 V, VOUT= 5.5 V to GND

27、 1, 2, 3 All -10 +10 A 01, 02 115 03 130 04, 05 140 Operating supply current ICC1VCC= 5.5 V, IOUT= 0 mA f = 1/tRCW , R , D0- D8pins are toggling between 0 V and 3 V FF , XO / HF = 0 mA Q0- Q8= 0 mA MR , FL / RT = 3.0 V 1, 2, 3 06 147 mA Standby current ICC2VCC= 5.5 V, IOUT= 0 mA All inputs = VIHFF ,

28、 XO / HF = 0 mA Q0- Q8= 0 mA 1, 2, 3 All 30 mA Power down current ICC3VCC= 5.5 V, IOUT= 0 mA All inputs = VCC-0.2 V FF , XO / HF = 0 mA Q0- Q8= 0 mA 1, 2, 3 All 25 mA Input capacitance CIN3/ VCC= 5.0 V TA= +25C, f = 1 MHz See 4.3.1c 4 All 8 pF Output capacitance COUT3/ VCC= 5.0 V TA= +25C, f = 1 MHz

29、 See 4.3.1c 4 All 8 pF Functional tests See 4.3.1d 7,8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISIO

30、N LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TA+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit 01 100 02 80 03 65 04 50 05 40 Read cycle time tRC9, 10, 11 06 35 n

31、s 01 8002 6503 5004 4005 30Access time tA9, 10, 11 06 25ns 01 20 02, 03 15 Read recovery time tRR9, 10, 11 04,05,06 10 ns 01 80 02 65 03 50 04 40 05 30 Read pulse width tPR9, 10, 11 06 25 ns Read low to low Z tLZR3/ 4/ 9, 10, 11 All 3 ns Read high to data valid tDVR9, 10, 11 All 3 ns 01,02,03 3004 2

32、505 20Read high to high Z tHZR3/ 4/ 9, 10, 11 06 18ns 01 100 02 80 03 65 04 50 05 40 Write cycle time tWCSee figure 3 9, 10, 11 06 35 ns 01 80 02 6503 5004 4005 30Write pulse width tPW9, 10, 11 06 25ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitte

33、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TA+125C 4.5 V VCC

34、5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit Write high to low Z tHWZ3/ 4/ 9, 10, 11 All 10 ns 01 2002, 03 15Write recovery time tWR9, 10, 11 04,05,06 10ns 01 4002,03 3004 2005 18Data setup time tSD9, 10, 11 06 15ns 01,02 1003 5Data hold time tHD9, 10, 11 04,05,06 0ns

35、01 10002 8003 6504 5005 40Master reset cycle time tMRSC9, 10, 11 06 35ns 01 8002 6503 5004 4005 30Master reset pulse width tPMR9, 10, 11 06 25ns 01 2002,03 15Master reset recovery time tRMR9, 10, 11 04,05,06 10ns 01 8002 6503 5004 4005 30Read high to master reset high tRPW3/ 9, 10, 11 06 25ns 01 80

36、02 6503 5004 4005 30Write high to master reset high tWPW3/ See figure 3 9, 10, 11 06 25ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS CO

37、LUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TA+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit 01 10002 8003 6504 5005 40Retransmit

38、 cycle time tRTC9, 10, 11 06 35ns 01 8002 6503 5004 4005 30Retransmit pulse width tPRT9, 10, 11 06 25ns 01 2002,03 15Retransmit recovery time tRTR9, 10, 11 04,05,06 10 ns 01 10002 8003 6504 5005 40Master reset to empty flag low tEFL9, 10, 11 06 35ns 01 10002 8003 6504 5005 40Master reset to half- fu

39、ll flag high tHFH9, 10, 11 06 35ns 01 10002 8003 6504 5005 40Master reset to full flag high tFFH9, 10, 11 06 35ns 01,02 6003 4504 3505 30Read low to empty flag low tREF9, 10, 11 06 25ns 01,02 6003 4504 3505 30Read high to full flag high tRFFSee figure 3 9, 10, 11 06 25ns See footnotes at end of tabl

40、e. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics

41、 - Continued. Limits Test Symbol Conditions 1/ -55C TA+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit 01,02 6003 4504 3505 30Write high to empty flag high tWEF9, 10, 11 06 25ns 01,02 6003 4504 3505 30Write low to full flag low tWFF9, 10, 11 06 25ns 01 1000

42、2 8003 6504 5005 40Write low to half-full flag low tWHF9, 10, 11 06 35ns 01 10002 8003 6504 5005 40Read high to half-full flag high tRHF9, 10, 11 06 35ns 01,02 6003 4504 3505 30Effective read from write high tRAE3/ 9, 10, 11 06 25ns 01 8002 6503 5004 4005 30Effective read pulse width after empty fla

43、g high tRPE9, 10, 11 06 25ns 01,02 6003 4504 3505 30Effective write from read high tWAF3/ 9, 10, 11 06 25ns 01 8002 6503 5004 4005 30Effective write pulse width after full flag high tWPFSee figure 3 9, 10, 11 06 25ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or netw

44、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89863 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TA+

45、125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit 01 80 02 65 03 50 04 40 05 30 Expansion out low delay from clock tXOL9, 10, 11 06 25 ns 01 80 02 6503 5004 4005 30Expansion out high delay from clock tXOHSee figure 3 9, 10, 11 06 25ns 1/ AC tests are performe

46、d with input rise and fall times of 5ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V to 3.0 V, and the output load on figure 4. 2/ These are absolute values with respect to device ground and all overshoots due to system or tester noise are included. 3/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table1. 4/ Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input. 3.5 Marking. Marking