DLA SMD-5962-89817 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 32K X 8-BIT UVEPROM MONOLITHIC SILICON《硅单片 32K X 8紫外线消除式可程序化只读存储器 氧化物半导体数字记忆微型电路》.pdf

《DLA SMD-5962-89817 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 32K X 8-BIT UVEPROM MONOLITHIC SILICON《硅单片 32K X 8紫外线消除式可程序化只读存储器 氧化物半导体数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89817 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 32K X 8-BIT UVEPROM MONOLITHIC SILICON《硅单片 32K X 8紫外线消除式可程序化只读存储器 氧化物半导体数字记忆微型电路》.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device types 03 06. Add U packages. Changes to Table I and Figures 1, 3, and 4. Editorial changes throughout. 93-02-19 M. A. Frye B Changes in accordance with NOR 5962-R239-93 93-10-01 M. A. Frye C Boilerplate update, part of 5 year review. k

2、sr 07-02-15 Joseph Rodenbeck THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Gary L. Gross DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray

3、Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-03-29 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 32K X 8-BIT UVEPROM, MONOLITHIC SILICON AMSC N/A REVI

4、SION LEVEL C SIZE A CAGE CODE 67268 5962-89817 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E206-07 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

5、REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the followi

6、ng example: 5962-89817 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 32K x 8 UVEPROM 55 ns 02 32K x 8 UVEPROM

7、 45 ns 03 32K x 8 UVEPROM 35 ns 04 32K x 8 UVEPROM 55 ns 05 32K x 8 UVEPROM 45 ns 06 32K x 8 UVEPROM 35 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP4-T28 or CDIP3-T28 28 Dual-in-li

8、ne 2/ Y GDFP2-F28 28 Flat pack 2/ Z CQCC1-N32 32 Rectangular leadless chip carrier 2/ U GDIP1-T28 or CDIP2-T28 28 Dual-in-line 2/ 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range- -0.5 V dc to +7.0 V dc DC voltage app

9、lied to outputs in high Z state - -0.5 V dc to +7.0 V dc DC input voltage- -3.0 V dc to +7.0 V dc DC program voltage - 13.0 V dc Maximum power dissipation (PD) - 1 .0 W 3/ Lead temperature (soldering, 10 seconds maximum)- +260C Thermal resistance, junction-to-case (JC) - See MIL-STD-1835 Junction te

10、mperature (TJ) - +175C Storage temperature range - -65C to +150C Temperature under bias - -55C to +125C Endurance- 10 cycles/byte minimum Data Retention - 10 years/minimum 1.4 Recommended operating conditions. Supply voltage (VCC)- 4.5 V dc to 5.5 V dc Ground voltage (GND) - 0.0 V DC Input high volt

11、age (VIH)- 2.0 V dc minimum Input Low voltage (VIL) - 0.8 V dc maximum Case operating temperature range (TC) - -55C to +125C 1/ Generic numbers are listed on the Standardized Military Drawing Source Approval Bulletin and will also be listed in MIL-BUL-103. 2/ Lid shall be transparent to permit ultra

12、violet light erasure. 3/ Must withstand the added PDdue to short circuit test; (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVIS

13、ION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are th

14、ose cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case

15、Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document

16、Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws an

17、d regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qu

18、alified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MI

19、L-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification ma

20、rk in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s)

21、 shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no a

22、ltered item drawing shall be as specified on figure 2. When required in groups A, B, C, or D (see 4.3), the devices shall be programmed by the manufacturer prior to test. A minimum of 50 percent of the total number of cells shall be programmed or at least 25 percent of the total number of cells to a

23、ny altered item drawing. 3.2.3.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item drawing. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table

24、I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networki

25、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limit Test Symbol Conditions -55C VIH, IOUT= 0 mA, VIN= 2

26、.0 V 40 Input capacitance 3/ CINVCC= 5.0 V, T = 25C, f = 1 MHz, (see 4.3.1c) 4 10 pF Output capacitance 3/ COUTVCC= 5.0 V, T = 25C, f = 1 MHz (see 4.3.1c) 4 10 Functional testing See 4.3.1e 7,8 Address to output valid tAA9,10,11 01,04 55 ns 02,05 45 See figures 3 and 4 and note 6/ 03,06 35 See footn

27、otes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performa

28、nce characteristics - Continued. Limit Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Min Max Unit 01,02 30 ns Chip select inactive to high Z ( CS1and CS2only) 3/ 7/ tHZCS03 25 04 30 Output enable inactive to high Z 3/ 7/ tHZOE05,06 25 0

29、1,02 30 Chip select active to output valid ( CS1and CS2only) tACS03 25 04 30 Output enable active to output valid tOE05,06 25 01,04 60 02,05 50 Chip enable inactive to high Z ( CE only) 3/ 7/ tHZCE03,06 40 01,04 60 02,05 50 Chip enable active to output valid ( CE only) tACE03,06 40 Chip enable activ

30、e to power up 3/ tPUALL 0 01,04 60 02,05 50 Chip enable inactive to power down 3/ tPD03,06 40 Output hold from address change 3/ tOHSee figures 3 and 4 and note 6/ 9,10,11 ALL 0 1/ These are absolute values with respect to device ground and all overshoots and undershoots due to system or tester nois

31、e are included. 2/ For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed thirty seconds. 3/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified

32、in table I. 4/ At f = fMAX, the inputs are switching at 1/tAA. 5/ Devices 01-03 CE = 0.0 V, CS1= 3.0 V, CS2= 0.0 V; devices 04-06 CE = 0.0 V, OE = 3.0 V. 6/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and

33、the output load on figure 3, circuit A. 7/ Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input with the output load on figure 3, circuit B. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

34、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device Types 01 - 03 04 - 06 Case Outlines X, Y Z U Z Terminal Number Terminal Symbol Terminal Symbol 1 2 3 4 5 6 7 8 9 10

35、 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A9A8A7A6A5A4A3A2A1A0O0O1O2GND O3O4O5O6O7CE CS2CS 1A14A13A12A11A10VCC- - - - NC A9A8A7A6A5A4A3A2A1A0NC O0O1O2GND NC O3O4O5O6O7CE CS2CS 1NC A14A13A12A11A10VCCVPPA12A7A6A5A4A3A2A1A0O0O1O2GND O3O4O5O6O7CE A10OE A11A9A8A13A14VCC- - - - NC

36、 VPPA12A7A6A5A4A3A2A1A0NC O0O1O2GND NC O3O4O5O6O7CE A10OE NC A11A9A8A13A14VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

37、 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Devices 01 - 03 State Mode CS2CS 1CE A14- A0Power Outputs Programmed Read VIHVILVILX ICCData out Standby X X VIHX ISBHigh Z Output disable X VIHX X ICCHigh Z Output disable VILX X X ICCHigh Z Unprogrammed Blank check ones VIHPVPPVILPX ICCZer

38、os Blank check zeros VILPVPPVILPX ICCOnes Devices 04 - 06 State Mode CE OE VPPA14- A0Power Outputs Programmed Read VILVILX X ICCData out Standby VIHX X X ISBHigh Z Output disable X VIHX X ICCHigh Z Unprogrammed Blank check ones VIHPVILPVPPX ICCZeros Blank check zeros VILPVILPVPPX ICCOnes NOTES: 1. X

39、 = Dont care 2. High Z = High-impedance state FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSC

40、C FORM 2234 APR 97 Circuit A Circuit B Output load Output load for tHZCS, tHZOE, and tHZCENOTE: Including scope and jig (minimum values). Load Circuit A Circuit B R1 658 658 R2 403 403 CL 30 5 AC test conditions Input pulse levels GND to 3.0 V Input rise and fall times 5 ns Input timing reference le

41、vels 1.5 V Output reference levels 1.5 V FIGURE 3. Output load circuits and test conditions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI

42、SION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CS 1and CS2are valid for device types 01-03 only. OE is valid for device types 04-06 only. 2. tHZOEand tOEare valid for device types 04-06 only. FIGURE 4. Switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted wi

43、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89817 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed

44、 in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance wit