DLA SMD-5962-89620 REV E-2011 MICROCIRCUIT LINEAR CURRENT FEEDBACK AMPLIFIER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Sheet 5: TABLE I. Quiescent supply current test. Under conditions column, add footnote 4/. Maximum DISABLE current to enable test. Under the conditions column, add footnote 4/. Sheet 6: TABLE I. Full power bandwidth tests. Test column, delete 4/

2、and substitute footnote 6/. Footnotes 4/, 5/, and 6/ are to be changed as follows; “4/ The output may be loaded with RL = 400 and VOUT= 0 V to eliminate test oscillations.” “ 5/ Guaranteed if not tested, to the limits specified in table I herein.” “6/ Full power bandwidth is guaranteed based on slew

3、 rate measurement. FPBW = SR/2VPEAK.” Sheet 10: Paragraph 6.6, add vendor CAGE number 34371. Changes in accordance with N.O.R. 5962-R006-95. 94-10-21 M. A. FRYE B Sheet 5: TABLE I. Trans-impedance test. Delete this test and footnote 3/ entirely. Quiescent supply current test. Under the conditions co

4、lumn, delete footnote 4/ and substitute 3/. Maximum DISABLE current to enable test. Under the conditions column, delete footnote 4/ and substitute 3/. Sheet 6: TABLE I. Slew rate tests. Under the group A subgroup column, for subgroup 8, delete footnote 5/ and substitute 4/. Full power bandwidth test

5、s. Under the test column, delete footnote 6/ and substitute 5/. Delete footnote 3/ entirely. Footnotes 4/, 5/, 6/ will renumbered as 3/, 4/, 5/. Changes in accordance with N.O.R. 5962-R193-96. 96-08-21 M. A. FRYE C Drawing updated to reflect current requirements. Redrawn. - ro 00-04-21 R. MONNIN D R

6、eplace reference to MIL-STD-973 with reference to MIL-PRF-38535. - ro 05-05-03 R. MONNIN E Update boilerplate paragraphs to current MIL-PRF-38535 requirements. - ro 11-01-31 C. SAFFLE THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV E E E E E E E E E OF SH

7、EETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY JOSEPH A. KERBY DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY CHARLES E. BESORE APPROVED

8、BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, CURRENT FEEDBACK AMPLIFIER, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-05-17 AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-89620 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E181-11 Provided by IHSNot for ResaleNo reproduction or networking permitted with

9、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in acc

10、ordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89620 01 P A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit fu

11、nction as follows: Device type Generic number Circuit function 01 HA-5020 Current feedback amplifer 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8 8 Dual-in-line 2 CQCC1

12、-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (VS) 18 V or 36 V Input voltage (VIN) 15 V or VSDifferential input voltage . 10 V Input current (IIN) (-INPUT or +INPUT pins) . 10 mA Inp

13、ut current (IIN) (BALANCE or DISABLE pins) . 5 mA Maximum power dissipation (PD) . 1.25 W Peak output current (IOP) . Short circuit protected Output short circuit duration (IOS) . Continuous 1/ Storage temperature range . -65C to +150C Lead temperature (soldering, 5 seconds) . +300C Junction tempera

14、ture (TJ) . +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) : Case P 125C/W Case 2 . 100C/W _ 1/ A heat sink is required to keep the junction temperature below the absolute maximum when the output is short circuited. Provided by IHSNot

15、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Positive supply voltage (+VS) . +15 V Ne

16、gative supply voltage (-VS) . -15 V Ambient operating temperature (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise sp

17、ecified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 -

18、Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standard

19、ization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes a

20、pplicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is

21、 produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in a

22、ccordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“

23、 certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The

24、case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and sh

25、all apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking pe

26、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA+125C unless otherwise specified Group

27、 A subgroups Device type Limits Unit Min Max Open loop characteristics Input offset voltage 2/ VOSVCM= 0 V 1 01 -10 +10 mV 2,3 -15 +15 Common mode rejection ratio CMRR VCM= 10 V 1,2,3 01 50 dB Power supply rejection ratio PSRR 4.5 V VS 18 V 1 01 65 dB 2,3 60 Positive input resistance +RIN1,2,3 01 1

28、M Positive input current +IINVCM= 0 V 1,2 01 -15 +15 A 3 -25 +25 Negative input current 2/ -IIN1,2 01 -40 +40 A 3 -50 +50 Positive input current power supply rejection ratio +IPSRR 4.5 V VS 18 V 1,2 01 0.5 A/V 3 1.0 Negative input current power supply rejection ratio -IPSRR 4.5 V VS 18 V 1,2 01 0.5

29、A/V 3 1.0 Negative input current common mode rejection ratio -ICMRR VCM= 10 V 1,2 01 2.0 A/V 3 4.0 Open loop dc voltage gain AVOL1RL= 400 , 4,5 01 70 dB VOUT= 10 V 6 60 AVOL2RL= 100 , 4,5 60 VOUT= 2.5 V 6 55 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking pe

30、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA+125C unless otherwise speci

31、fied Group A subgroups Device type Limits Unit Min Max Open loop characteristics continued. Output voltage swing VORL= 400 4,5 01 12 V 6 11 Output current IOUTRL= 400 4,5 01 30 mA 6 27.5 Quiescent supply current IS3/ 1 01 12 mA 2,3 13 Supply current, disabled ISoff DISABLE voltage = 0 V 1,2,3 01 7.5

32、 mA DISABLE current IlogicDISABLE voltage = 0 V 1,2,3 01 1.5 mA Minimum DISABLE current to disable Id1,2,3 01 250 A Maximum DISABLE current to enable Ie3/ 1,2,3 01 30 A AC closed loop characteristics. Slew rate SR1 Closed loop gain of 1 V/V (0 dB), RL= 400 , VO= 10 V, RF= 1 k 7 01 300 V/s 8 4/ 250 S

33、lew rate SR10 Closed loop gain of 10 V/V (20 dB), 7 01 300 V/s RL= 400 , VO= 10 V, RF= 1 k, RG= 111 8 4/ 250 Full power bandwidth 5/ FPBW1 Closed loop gain of 1 V/V (0 dB), RF= 1 k, TA= +25C 7 01 4.77 MHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permi

34、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA+125C unless otherwise specifie

35、d Group A subgroups Device type Limits Unit Min Max AC closed loop characteristics continued. Full power bandwidth 5/ FPBW10 Closed loop gain of 10 V/V (20 dB), 7 01 4.77 MHz RF= 1 k, RG= 111 , TA= +25C 1/ VS= 15 V, RS= 50 , RL= . 2/ The offset voltage and inverting input current can be adjusted wit

36、h an external 10 k pot between the BALANCE pins with the wiper connected to +VSto make the output offset voltage zero. 3/ The output may be loaded with RL= 400 and VOUT= 0 V to eliminate test oscillations. 4/ Guaranteed if not tested, to the limits specified in table I herein. 5/ Full power bandwidt

37、h is guaranteed based on slew rate measurement. FPBW = SR / 2Vpeak. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire

38、SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance i

39、ndicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply

40、in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conf

41、ormance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 V

42、erification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHS

43、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines P 2 Terminal number Terminal symbol 1 BALANCE

44、 NC 2 -INPUT BALANCE 3 +INPUT NC 4 -VSNC 5 BALANCE NC 6 OUTPUT -INPUT 7 +VSNC 8 DISABLE +INPUT 9 - -VS10 - NC 11 - NC 12 - BALANCE 13 - NC 14 - OUTPUT 15 - NC 16 - +VS17 - NC 18 - NC 19 - NC 20 - DISABLE NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction

45、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89620 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance w

46、ith MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test conditio

47、n A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accord

48、ance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria sha