DLA SMD-5962-89477 REV E-2008 MICROCIRCUIT HYBRID LINEAR OPTOCOUPLER AC DC LOGIC INTERFACE.pdf

《DLA SMD-5962-89477 REV E-2008 MICROCIRCUIT HYBRID LINEAR OPTOCOUPLER AC DC LOGIC INTERFACE.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89477 REV E-2008 MICROCIRCUIT HYBRID LINEAR OPTOCOUPLER AC DC LOGIC INTERFACE.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added case outlines X and Y. Updated to reflect MIL-H-38534 processing. Rewrote entire document. 93-08-02 K. A. Cottongim B Changes in accordance with NOR 5962-R039-94. 93-11-12 K. A. Cottongim C Added device type 02 as class K. Redrew entire doc

2、ument. -sld 98-06-05 K. A. Cottongim D Table I; Changed the max limits for the Input clamp voltage test as follows: VICH1from 6.7 V to 7.5 V, VICH2from 7.4 V to 8.0 V, VICH3from 13.0 V to 14.0 V and in the conditions block for the VICH3test changed the IINfrom 15 mA to 13.5 mA. 01-06-14 Raymond Monn

3、in E Update drawing. -gz 08-06-02 Robert M. Heber REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Donald Osborne COLUMBUS, OHIO 43218-399

4、0 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-04-02 MICROCIRCUIT, HYBRID, LINEAR, OPTOCOUPLER, AC/DC LOGIC INTERFACE AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962

5、-89477 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E240-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89477 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 A

6、PR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness a

7、ssurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: For class H devices: 5962-89477 01 P X Drawing number Device type Case outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) For class K devices: 5962 - 89477 02 K P X Federal RHA Device Device C

8、ase Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked

9、 with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 HCPL-5761 AC/DC to logic interface, optocoupler 02 HCPL-576K AC/DC to logic interface, optoco

10、upler 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). T

11、he product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliabil

12、ity devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic an

13、d conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document shou

14、ld be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo re

15、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89477 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as foll

16、ows: Outline letter Descriptive designator Terminals Package style P CDIP2-T8 8 Dual-in-line X See figure 1 8 Dual-in-line Y See figure 1 8 Dual-in-line 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Average input current (IIN). 15 mA 2/ I

17、nput surge current (IINSG) . 140 mA 2/ 3/ Peak transient input current (IINPK) 500 mA 2/ 3/ Average output current (IO). 40 mA Supply voltage range (VCC). -0.5 V dc to +20 V dc Output voltage range (VO). -0.5 V dc to +20 V dc Input power dissipation (PIN). 195 mW 4/ Total package power dissipation (

18、PD). 260 mW Output power dissipation (POUT) . 65 mW Storage temperature range. -65C to +150C Lead temperature (soldering, 10 seconds). +260C Thermal resistance, junction-to-case (JC): Case outline P. See MIL-STD-1835 Case outlines X and Y. 28C/W 1.4 Recommended operating conditions. Supply voltage r

19、ange (VCC). +3.0 V dc to +18 V dc Operating frequency range (fOP) . 0 to 10 kHz Ambient operating temperature range (TA). -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to

20、 the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Stan

21、dard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla

22、.mil/quicksearch/ from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in t

23、his document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Curren

24、t into/out of any single lead. 3/ Surge input current duration is 3 milliseconds at 120 Hz pulse repetition rate. Transient input current duration is 10 microseconds at 120 Hz at pulse repetition rate. Note that maximum input power, PINmust be observed. 4/ Derate linearly above 100C free-air tempera

25、ture at a rate of 4.26 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89477 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 I

26、tem requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as

27、 designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affe

28、ct the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.

29、4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.4 Propagation delay times test circuit and waveform. The propagation delay times test circuit and waveform shal

30、l be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical t

31、est requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manuf

32、acturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sampl

33、e, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC

34、-VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of

35、 MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with

36、 MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

37、CUIT DRAWING SIZE A 5962-89477 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device types Limits Unit Min Max I

38、nput threshold current ITH+VO= 0.4 V, IO 2.6 mA, VIN= VTH+, VCC= 4.5 V 1/ 1, 2, 3 All 1.75 3.20 mA ITH-VO= 2.4 V, IO 250 A, VIN= VTH-, VCC= 4.5 V 1/ 1, 2, 3 All 0.93 1.62 mA Input threshold voltage, dc (pins 2 and 3) vTH+Pins 1 and 4 open, VCC= 4.5 V, VIN= V2- V3 1/ VO= 0.4 V, IO 2.6 mA 1, 2, 3 All

39、3.18 4.10 V VTH-VO= 2.4 V, IO 250 A 1, 2, 3 All 1.90 3.00 V Input threshold voltage, ac (pins 1 and 4) vTH+Pins 2 and 3 open, VCC= 4.5 V, VIN= V1- V4 1/ 2/ VO= 0.4 V, IO 2.6 mA 1, 2, 3 All 3.79 5.62 V VTH-VO= 2.4 V, IO 250 A 1, 2, 3 All 2.57 4.52 V Input clamp voltage VIHC1Pins 1 and 4 connected to

40、pin 3, IIN= 10 mA, V3= GND, VIHC1= V2- V31, 2, 3 All 5.3 7.5 V VIHC2Pins 2 and 3 open, IIN= 10 mA, VIHC2= V1- V41, 2, 3 All 6.0 8.0 V VIHC3Pins 1 and 4 open, IIN= 13.5 mA, V3= GND, VIHC3= V2- V31, 2, 3 All 14.0 V Input current IINPins 1 and 4 open, VIN= V2- V3= 5.0 V 1, 2, 3 All 3.0 4.5 mA Logic low

41、 output voltage 1/ VOLVCC= 4.5 V, IOL= 2.6 mA 1, 2, 3 All 0.4 V Logic high output current IOHVOH= VCC= 18 V 1/ 1, 2, 3 All 250 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-

42、89477 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device types Limits Unit Min Max Logic low supp

43、ly current ICCLVCC= 18 V, VO= open, V2- V3= 5.0 V 1/ 1, 2, 3 All 3.0 mA Logic high supply current ICCHVCC= 18 V, VO= open, 1/ 1, 2, 3 All 20 A Input to output insulation leakage current II-OTA= +25C, t = 5 seconds, VI-O= 1500 V dc, Relative humidity = 45% 3/ 1 All 1.0 A Propagation delay time to log

44、ic low output level tPHLSee figure 4, RL= 1.8 k, CL= 15 pF 4/ 9, 10, 11 All 20 s Propagation delay time to logic high output level tPLHSee figure 4, RL= 1.8 k, CL= 15 pF 4/ 9, 10, 11 All 40 s Logic high common mode transient immunity 7/ CMH VCM= 50 V, IIN= 0 mA, TA= +25C 5/ 6/ 9 All 1000 V/s Logic l

45、ow common mode transient immunity 7/ CML VCM= 50 V, IIN= 4.0 mA, TA= +25C 5/ 6/ 9 All 1000 V/s 1/ Logic low output level at pin 6 occurs under the conditions of VIN VTH+as well as the range of VIN VTH-once VINhas exceeded VTH+. Logic high output level at pin 6 occurs under the conditions of VIN VTH-

46、as well as the range of VIN2.0 V). Common mode transient immunity in logic low level is the maximum tolerable dVCM/dtof the common mode voltage, VCM, to ensure that the output will remain in a logic low state (i.e., VO 0.8 V). 6/ In applications where dVCM/dtmay exceed 50,000 V/s (such as static dis

47、charge), a series resistor, RCCshould be included to protect the detector IC from destructively high surge currents. The recommended value for RCCis 240 per volt of allowable drop in VCC(between pin 8 and VCC) with a minimum value of 240. 7/ Parameters shall be tested as part of device initial chara

48、cterization and after process changes. Parameters shall be guaranteed to the limits specified in table I for all lots not specifically tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89477 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Ca