DLA SMD-5962-88545 REV C-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 64K X 4 SRAM (LOW POWER) MONOLITHIC SILICON《硅单片64K X 4低功耗静态存取存储器互补型金属氧化物半导体数字存储微电路》.pdf

《DLA SMD-5962-88545 REV C-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 64K X 4 SRAM (LOW POWER) MONOLITHIC SILICON《硅单片64K X 4低功耗静态存取存储器互补型金属氧化物半导体数字存储微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-88545 REV C-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 64K X 4 SRAM (LOW POWER) MONOLITHIC SILICON《硅单片64K X 4低功耗静态存取存储器互补型金属氧化物半导体数字存储微电路》.pdf（16页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R216-92. 92-06-22 Michael A. Frye B Updated drawing to current requirements. Editorial changes throughout. - gap 01-04-04 Raymond Monnin C Added “Memory” in the SMD title block. Also, boilerplate update and par

2、t of five year review. tcr 07-02-28 Robert M. Heber THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MI

3、CROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Charles Reusing MICROCIRCUITS, MEMORY, DIGITAL, CMOS, 64K X 4 SRAM (LOW POWER), MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE

4、 DRAWING APPROVAL DATE 88-08-04 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88545 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E258-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88545 DEFENSE SUPPL

5、Y CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN).

6、 The complete PIN is as shown in the following example: 5962-88545 01 L A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01

7、 5C256L4 64K X 4 low power CMOS SRAM 35 ns 02 5C256L4 64K X 4 low power CMOS SRAM 45 ns 03 5C256L4 64K X 4 low power CMOS SRAM 55 ns 04 5C256L4 64K X 4 low power CMOS SRAM 70 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive de

8、signator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line X CQCC3-N28 28 Rectangular leadless chip carrier Y CDFP4-F28 28 Flat package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Voltage on any input relative to VSS -

9、0.5 V dc to +7.0 V dc Voltage applied to outputs -0.5 V dc to +6.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) . 1.0 W Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +150C 1/ 1.4

10、Recommended operating conditions. Supply voltage (VCC) 4.5 V dc to 5.5 V dc Supply voltage (VSS) 0 V dc Input high voltage (VIH) 2.2 V dc to VCC+0.5 V dc Input low voltage (VIL) -0.5 V dc to +0.8 V dc 2/ Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum junction temperature shall no

11、t be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ VILminimum = -3.0 V dc for pulse width less than 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

12、CUIT DRAWING SIZE A 5962-88545 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to

13、the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Tes

14、t Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist

15、.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of th

16、is drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class le

17、vel B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with t

18、he manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. Thes

19、e modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as

20、specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. Provided b

21、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88545 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.2.4 Die overcoat. Polyimide and silicone coatings are allo

22、wable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal w

23、ater vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for clases Q and V. Samples may be pulled anytime after seal. 3.3 Electrical performance characteristics. Unless otherwise specified h

24、erein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are de

25、scribed in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limi

26、tations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QM

27、L“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificat

28、e of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535

29、, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the opt

30、ion to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

31、 5962-88545 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C VCC= 4.5 V to 5.5 V VSS= 0 V Group A subgroups Device type Limits Unit unless otherwise specified

32、Min Max Operating supply current ICC1tAVAV= tAVAV(minimum), 1, 2, 3 All 100 mA 1/ VCC= 5.5 V, CE = VIL, all other inputs at VILStandby power supply ICC2CE VIH, all other inputs 1, 2, 3 All 25 mA current, TTL 1/ VILor VIH, VCC= 5.5 V, f = 0 MHz Standby power supply ICC3CE (VCC-0.2 V), f = 0 MHz,1, 2,

33、 3 All 3 mA current, CMOS 1/ VCC= 5.5 V, all other inputs 0.2 V or (VCC-0.2 V) Data retention current 1/ ICC4VCC= 2.0 V 1, 2, 3 All 900 A Input leakage current, IILKVCC= 5.5 V, 1, 2, 3 All 10 A any input VIN= 0 V to 5.5 V Off-state output leakage IOLKVCC= 5.5 V, 1, 2, 3 All 10 A current VIN= 0 V to

34、5.5 V Data retention voltage VDRVIN 0.2 V or (VCC- 0.2 V), 1, 2, 3 All 2.0 V CE (VCC- 0.2 V) Output high voltage VOHIOUT= -4.0 mA, VCC= 4.5 V, 1, 2, 3 All 2.4 V IL= 0.8 V, VIH= 2.2 V Output low voltage VOLIOUT= 8.0 mA, VCC= 4.5 V, 1, 2, 3 All 0.4 V VIL= 0.8 V, VIH= 2.2 V Input capacitance CINVIN= 0

35、V 4 All 10.0 pF f = 1.0 MHz, TC= +25C, See 4.3.1c Output capacitance COUTVIN= 0 V 4 All 12.0 pF f = 1.0 MHz, TC= +25C, See 4.3.1c See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962

36、-88545 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 2/ -55C TC +125C VCC= 4.5 V to 5.5 V VSS= 0 V Group A subgroups Device type Limits Unit unless otherwise sp

37、ecified Min Max Chip enable access time tELQVSee figure 4 9, 10, 11 01 35 ns 02 45 03 55 04 70 Read cycle time tAVAVSee figure 4 3/ 9, 10, 11 01 35 ns 02 45 03 55 04 70 Address access time tAVQVSee figure 4 4/ 9, 10, 11 01 35 ns 02 45 03 55 04 70 Output hold after address tAVQXSee figure 4 9, 10, 11

38、 All 3.0 ns change Chip enable to output tELQXSee figure 4 5/, 6/ 9, 10, 11 All 3.0 ns active Chip disable to output tEHQZSee figure 4 5/, 6/ 9, 10, 11 01, 02 0 20 ns inactive 03 0 25 04 0 30 Chip enable to power up tELPUSee figure 4 5/ 9, 10, 11 All 0 ns Chip enable to power down tEHPDSee figure 4

39、5/ 9, 10, 11 01 35 ns 02 45 03 55 04 70 Write cycle time tAVAVSee figure 5 9, 10, 11 01 35 ns 02 45 03 55 04 70 Write pulse width tWLWHSee figure 5 9, 10, 11 01 30 ns 02 40 03 50 04 55 Chip enable to end of tELEHSee figure 5 9, 10, 11 01 30 ns write 02 40 03 50 04 55 Data setup to end of tDVWHSee fi

40、gure 5 9, 10, 11 01, 02 20 ns write 03, 04 25 Data hold after end of tWHDXSee figure 5 9, 10, 11 All 0 ns write See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88545 DEFENSE SUP

41、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 2/ -55C TC +125C VCC= 4.5 V to 5.5 V VSS= 0 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Ad

42、dress setup to end of tAVWHSee figure 5 9, 10, 11 01 30 ns write 02 40 03 50 04 55 Address setup to tAVWLSee figure 5 9, 10, 11 All 0 ns beginning of write (write cycle number 1) tAVELSee figure 5 9, 10, 11 All 0 ns (write cycle number 2) Address hold after tWHAVSee figure 5 9, 10, 11 All 5.0 ns end

43、 of write Write enable to output tWLQZSee figure 5 5/, 6/ 9, 10, 11 01, 02 0 20 ns disable 03 0 25 04 0 30 Output active after tWHQXSee figure 5 5/, 6/, 7/ 9, 10, 11 All 0 ns end of write Deselect time tEHVCCL See figure 6 5/, 8/ 9, 10, 11 All tAVAVns (min) Recovery time tVCCHEL See figure 6 5/, 8/

44、9, 10, 11 All tAVAVns (min) 1/ ICCis dependent upon output loading and cycle rate. The specified values apply with output(s) unloaded. 2/ AC measurements assume signal transition times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V to 3.0 V and output loading of 30 pF l

45、oad capacitance. Output timing reference is 1.5 V, see figure 3. 3/ For read cycles 1 and 2, WE is high for entire cycle. 4/ Device is continuously selected, CE low. 5/ Parameter if not tested, shall be guaranteed to the limits specified in table I. 6/ Measured 500 mV from steady state output voltag

46、e. Load capacitance is 5.0 pF, see figure 3. 7/ If WE is low when CE goes low, the output remains in the high impedance state. 8/ Supply recovery rate should not exceed 10 s per volt from VDRto VCCminimum. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

47、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88545 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device type All Case outline L X Y Terminal number Terminal Symbol 1 A6NC NC 2 A7A6A03 A8 7 14 A9A8A25 A10 9 36 A11A10A47 A12 11 58 A13A12A69 A1

48、4 13 710 A15A14A811 CE A15 912 VSSCE CE 13 WE NC NC 14 I/O4VSSVSS15 I/O3NC WE 16 I/O2WE I/O117 I/O1I/O4I/O218 A0I/O3I/O319 A1I/O2I/O420 A2I/O1NC 21 A3A0NC 22 A4 1A1023 A5A2 1124 VCC 3A1225 - A4 1326 - A5A1427 - NC A1528 - VCCVCCFIGURE 1. Terminal connections. CE WE Mode I/O Power H X Not selected High Z Standby L L Write DINActive L H Read DOUTActive H = Logic “1” state L