DLA MIL-PRF-19500 448 F-2013 SEMICONDUCTOR DEVICE TRANSISTOR PNP SILICON LOW-POWER TYPE 2N4405 2N4405UA and 2N4405UB JAN AND JANTX.pdf
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1、 MIL-PRF-19500/448F 12 September 2013 SUPERSEDING MIL-PRF-19500/448E 18 October 2011 PERFORMANCE SPECIFICATION SHEET SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, SILICON, LOW-POWER, TYPE 2N4405, 2N4405UA, and 2N4405UB, JAN AND JANTX This specification is approved for use by all Departments and Agencies of
2、 the Department of Defense. The requirements for acquiring the product described herein shall consist of this specification sheet and MIL-PRF-19500. 1. SCOPE 1.1 Scope. This specification covers the performance requirements for PNP, silicon, low-power transistors. Two levels of product assurance are
3、 provided for each device type as specified in MIL-PRF-19500. 1.2 Physical dimensions. See figure 1 (similar to TO-39), figure 2 (UA), and figure 3 (UB). 1.3 Maximum ratings TA= +25C unless otherwise stated. Types PT(1) TC= +25C PT(1) TA= +25C PT(1) TSP(IS)= +25C PT(1) TSP(AM)= +25C RJC(2) RJA(2) RJ
4、SP(IS)(2) RJSP(AM)(2) 2N4405 2N4405UA 2N4405UB W 5.0 N/A N/A W 1.0 N/A N/A W N/A 1.0 1.0 W N/A 4 N/A C/W 35 N/A N/A C/W 175 N/A N/A C/W N/A 110 90 C/W N/A 40 N/A Types VCBOVCEOVEBOICTSTGand TJ2N4405 2N4405UA 2N4405UB V dc 80 80 80 V dc 80 80 80 V dc 5 5 5 A dc 0.5 0.5 0.5 C -65 to +200 -65 to +200 -
5、65 to +200 (1) See figures 4, 5, 6, 7, and 8. (2) For thermal impedance, see figures 9, 10, 11, 12, and 13. AMSC N/A FSC 5961 INCH-POUND * Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime, ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed
6、to Semiconductordla.mil. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at https:/assist.dla.mil . The documentation and process conversion measures necessary to comply with this document shall be completed by 12
7、 December 2013. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/448F 2 1.4 Primary electrical characteristics TA= +25C unless otherwise stated. Limit hFE1(1) hFE3(1) VBE(SAT)2(1) VCE(SAT)3(1) Cobo|hfe| VCE= 5 V dc IC= 100 A dc VCE= 5 V
8、dc IC= 150 mA dc IC= 500 mA dc IB= 50 mA dc IC= 500 mA dc IB= 50 mA dc VCB= 10 V dc IE= 0 mA dc 100 kHz f 1 MHz VCE= 20 V dc IC= 50 mA dc f = 100 MHz Min Max 75 100 300 V dc 0.85 1.20 V dc 0.5 pF 20 2.0 6.0 (1) Pulsed (see 4.5.1). 2. APPLICABLE DOCUMENTS 2.1 General. The documents listed in this sec
9、tion are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, document users ar
10、e cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of
11、this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750
12、- Test Methods for Semiconductor Devices. * (Copies of these documents are available online at http:/quicksearch.dla.mil or https:/assist.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. Unless otherwise
13、noted herein or in the contract, in the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Prov
14、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/448F 3 Dimensions Symbol Inches Millimeters Notes Min. Max. Min. Max. CD .305 .335 7.75 8.51 CH .24 .26 6.1 6.6 HD .335 .37 8.51 9.4 LC .200 TP 5.08 TP 4 LD .016 .021 .41 .53 2, 5 LL .500 .750
15、 12.70 19.05 5 LU .016 .019 .41 .48 3, 5 L1 .050 1.27 L2 .250 6.35 P .100 2.54 Q .040 1.02 r .007 .18 TL .029 .045 .74 1.14 TW .028 .034 .71 .86 45 TP 45 TP NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. Measured in the zone beyond .250 (6.35) from the
16、seating plane. 4. Measured in the zone .050 (1.27 mm) and .250 (6.35) from the seating plane. 5. Measured from the maximum diameter of the actual case. 6. All three leads. 7. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. 8. Lead 1 is the emitter, lead 2 is the base, and le
17、ad 3 is the collector, which is electrically connected to the case. FIGURE 1. Physical dimensions for 2N4405 (similar to TO-39). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/448F 4 Dimensions Note Symbol Inches Millimeters Min Max Mi
18、n Max BL .215 .225 5.46 5.71 BL2.225 5.71 BW .145 .155 3.68 3.93 BW2.155 3.93 CH .061 .075 1.55 1.90 3 L3.003 0.08 5 LH .029 .042 0.74 1.07 LL1.032 .048 0.81 1.22 LL2.072 .088 1.83 2.23 LS .045 .055 1.14 1.39 LW .022 .028 0.56 0.71 LW2.006 .022 0.15 0.56 5 Pin no. 1 2 3 4 Transistor Collector Emitte
19、r Base N/C NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. Dimension “CH“ controls the overall package thickness. When a window lid is used, dimension “CH“ must increase by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm). 4. The c
20、orner shape (square, notch, radius, etc.) may vary at the manufacturers option, from that shown on the drawing. * 5. Dimensions “LW2“ minimum and “L3“ minimum and the appropriate castellation length define an unobstructed three-dimensional space traversing all of the ceramic layers in which a castel
21、lation was designed. (Castellations are required on bottom two layers, optional on top ceramic layer.) Dimension “LW2“ maximum define the maximum width and depth of the castellation at any point on its surface. Measurement of these dimensions may be made prior to solder dipping. 6. The coplanarity d
22、eviation of all terminal contact points, as defined by the device seating plane, shall not exceed .006 inch (0.15mm) for solder dipped leadless chip carriers. 7. In accordance with ASME Y14.5M, diameters are equivalent to x symbology. * FIGURE 2. Physical dimensions, surface mount (UA version). Prov
23、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/448F 5 Ltr. Dimensions Note Ltr. Dimensions Note Inches Millimeters Inches Millimeters Min Max Min Max Min Max Min Max BH .046 .056 1.17 1.42 LS1 .035 .040 0.89 1.02 BL .115 .128 2.92 3.25 LS2
24、 .071 .079 1.80 2.01 BW .085 .108 2.16 2.74 LW .016 .024 0.41 0.61 CL .128 3.25 r .008 0.20 CW .108 2.74 r1 .012 0.31 LL1 .022 .038 0.56 0.96 r2 .022 0.56 LL2 .017 .035 0.43 0.89 NOTES: NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. Hatched areas on pac
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