DLA DSCC-VID-V62 05602 REV A-2011 MICROCIRCUIT DIGITAL OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-11-29 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE
2、V PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VO
3、LTAGE AND THREE-STATE OUTPUTS, MONOLITHIC SILICON YY MM DD 05-02-17 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/05602 REV PAGE 1 OF 15 AMSC N/A 5962-V006-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER
4、, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05602 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal bus transceiver with adjustable output voltage and three-state outputs microcircuit, with an operating temperature rang
5、e of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/05602 - 01 X E Drawing Device type Case o
6、utline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). 1/ Device type Generic Circuit function 01 SN74LVCC3245A-EP Octal bus transceiver with adjustable output voltage and three-state outputs 1.2.2 Case outline(s). The case outlines are as specified herein. Outline lette
7、r Number of pins JEDEC PUB 95 Package style X 24 JEDEC M0-153 Plastic small outline package Y 24 JEDEC M0-153 Plastic small outline package Z 24 JEDEC MS-013 Plastic small outline package U 24 Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead f
8、inishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1/ Users are cautioned to review the manufacturers data manual for additional user information relating to this device. Provided by IHS
9、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05602 REV A PAGE 3 1.3 Absolute maximum ratings. 2/ Supply voltage ranges, (VCCAand VCCB) . -0.5 V to +6.0 V Input voltage range,
10、(VIN): All A ports 3/ -0.5 V to VCCA+ 0.5 V All B ports 4/ -0.5 V to VCCB+ 0.5 V Except I/O ports 3/ -0.5 V to VCCA+ 0.5 V Output voltage range, (VO): 3/ All A ports -0.5 V to VCCA+ 0.5 V All B ports -0.5 V to VCCB+ 0.5 V Input clamp current, IIK(VIN 0) . -50 mA 3/ Output clamp current, IOK(VO 0) -5
11、0 mA Continuous output current, (IO) . 50 mA Continuous current through VCCA, VCCB, or GND 100 mA Package thermal impedance, (JA) 5/ : Case X . +88C/W Case Y +63C/W Case Z +46C/W Case U +65C/W Storage temperature range, (TSTG) . -65C to +150C 1.4 Recommended operating conditions. 6/ VCCAVCCBMin Max
12、Unit Supply voltage, (VCCA) 2.3 3.6 V Supply voltage, (VCCB) 3.0 5.5 V High level input voltage, (VIHA) 2.3 V 3.0 V 1.7 V 2.7 V 3.0 V 2 3.0 V 3.6 V 2 3.6 V 5.5 V 2 High level input voltage, (VIHB) 2.3 V 3.0 V 2 V 2.7 V 3.0 V 2 3.0 V 3.6 V 2 3.6 V 5.5 V 3.85 Low level input voltage, (VILA) 2.3 V 3.0
13、V 0.7 V 2.7 V 3.0 V 0.8 3.0 V 3.6 V 0.8 3.6 V 5.5 V 0.8 Low level input voltage, (VILB) 2.3 V 3.0 V 0.8 V 2.7 V 3.0 V 0.8 3.0 V 3.6 V 0.8 3.6 V 5.5 V 1.65 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and func
14、tional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3/ This value is limited to 4.6 V maximum. 4/ This value i
15、s limited to 6.0 V maximum. 5/ The package thermal impedance is calculated in accordance with JEDS 51-7. 6/ All unused inputs of the device must be held at the associated VCCor GND to ensure proper device operation. Refer to the manufacturer for more details. Provided by IHSNot for ResaleNo reproduc
16、tion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05602 REV A PAGE 4 1.5 Recommended operating conditions - continued. 6/ VCCAVCCBMin Max Unit High level input voltage (control pins) (VIH) (Referenced to V
17、CCA) 2.3 V 3.0 V 1.7 V 2.7 V 3.0 V 2 3.0 V 3.6 V 2 3.6 V 5.5 V 2 Low level input voltage (control pins) (VIL) (Referenced to VCCA) 2.3 V 3.0 V 0.7 V 2.7 V 3.0 V 0.8 3.0 V 3.6 V 0.8 3.6 V 5.5 V 0.8 Input voltage, (VIA) 0 VCCAV Input voltage, (VIB) 0 VCCBV Output voltage, (VOA) 0 VCCAV Output voltage,
18、 (VOB) 0 VCCBV High level output current, (IOHA) 2.3 V 3.0 V -8 mA 2.7 V 3.0 V -12 3.3 V 3.0 V -24 High level output current, (IOHB) 2.3 V 3.3 V -12 mA 2.7 V 3.3 V -12 3.3 V 3.0 V -24 Low level output current, (IOLA) 2.3 V 3.3 V 8 mA 2.7 V 3.3 V 12 3.3 V 3.0 V 24 Low level output current, (IOLB) 2.3
19、 V 3.3 V 12 mA 2.7 V 3.3 V 12 3.3 V 3.0 V 24 Input transition rise or fall rate, (t/v) 10 ns/V Operating free air temperature, (TA) -40 85 C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE ID
20、ENT NO. 16236 DWG NO. V62/05602 REV A PAGE 5 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology As
21、sociation, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identificati
22、on (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1
23、.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections
24、shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as specified in figure 3. 3.5.4 Function table. The function table shall be as specified in figure 4. 3.5.5 Timing waveforms. The timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproductio
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