DLA DSCC-VID-V62 04664 REV A-2010 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER AND 3 3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf
《DLA DSCC-VID-V62 04664 REV A-2010 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER AND 3 3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA DSCC-VID-V62 04664 REV A-2010 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER AND 3 3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf(11页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 10-04-19 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY
2、Charles F. Saffle DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.milOriginal date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-03
3、-11 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04664 REV A PAGE 1 OF 11 AMSC N/A 5962-V045-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO.
4、 V62/04664 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal bus transceiver and 3.3-V to 5-V shifter with 3-state outputs microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Numb
5、er. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04664 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 De
6、vice type(s). Device type Generic Circuit function 01 SN74LVC4245A-EP Octal bus transceiver and 3.3-V to 5-V shifter with 3-state outputs 1.2.2 Case outline. The case outline are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 24 MO-153 Plastic small-outline1.2.3 Lead
7、 finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Provided by IHSNot for ResaleNo reproduction or networking permitted without li
8、cense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04664 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ For VCCA= 4.5 V to 5.5 V: Supply voltage range (VCCA) -0.5 V to 6.5 V Input voltage range (VI): A port . -0.5 V to VCCA+0.5 V 2/ Control input
9、s -0.5 V to 6 V Output voltage range (VO) (A port) -0.5 V to VCCA+0.5 V 2/ Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50 mA Continuous output current (IO) . 50 mA Continuous current through VCCAor GND . 100 mA Package thermal impedance (JA) . 88C/W 3/ Storage temper
10、ature range (TSTG) . -65C to 150C For VCCB= 2.7 V to 3.6 V: Supply voltage range (VCCB) -0.5 V to 4.6 V Input voltage range (VI) (B port) -0.5 V to VCCB+0.5 V 4/ Output voltage range (VO) (B port) -0.5 V to VCCB+0.5 V 4/ Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50
11、 mA Continuous output current (IO) . 50 mA Continuous current through VCCBor GND . 100 mA Package thermal impedance (JA) . 88C/W 3/ Storage temperature range (TSTG) . -65C to 150C 1.4 Recommended operating conditions. 5/ 6/ For VCCA= 4.5 V to 5.5 V: Supply voltage range (VCCA) 4.5 V to 5.5 V Minimum
12、 high-level input voltage (VIH) 2.0 V Maximum low-level input voltage (VIL) . 0.8 V Input voltage range (VI) . 0 V to VCCAOutput voltage range (VO) . 0 V to VCCAMaximum high level output current (IOH) . -24 mA Maximum low level output current (IOL) . 24 mA Operating free-air temperature range (TA) -
13、40C to +85C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied
14、. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ This value is limited to 6 V maximum. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ This value is limited to 4.6 V maximum. 5/ All unused inputs of the device must
15、 be held at the associated VCCor GND to ensure proper device operation. 6/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits.
16、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04664 REV A PAGE 4 1.4 Recommended operating conditions Continued 5/ 6/ For VCCB= 2.7 V to 3.6 V: Supply voltage ra
17、nge (VCCB) 2.7 V to 3.6 V Minimum high-level input voltage (VIH) (VCCB= 2.7 V to 3.6 V) . 2.0 V Maximum low-level input voltage (VIL) (VCCB= 2.7 V to 3.6 V) 0.8 V Input voltage range (VI) . 0 V to VCCBOutput voltage range (VO) . 0 V to VCCBMaximum high level output current (IOH): VCCB= 2.7 V -12 mA
18、VCCB= 3 V . -24 mA Maximum low level output current (IOL): VCCB= 2.7 V 12 mA VCCB= 3 V . 24 mA Operating free-air temperature range (TA) -40C to +85C 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 - High Effective Thermal Conductivity
19、 Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manu
20、facturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Ele
21、ctrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diag
22、rams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure
23、 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/0
24、4664 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCA2/ Temperature, TALimits Unit Min Max A Port High level output voltage VOHIOH= -100 A 4.5 V 25C, -40C to 85C 4.3 V 5.5 V 5.3 IOH= -24 mA 4.5 V 3.7 5.5 V 4.7 Low level output voltage VOLIOL= 100 A 4.5 V 0
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