CECC 90 104- 125 ISSUE 1-1981 BS CECC 90 104-125 Silicon Complementary MOS with (B) Buffered Outputs and Cavity Packaging (En)《BS CECC 90 104-125 带(B)缓冲输出腔体封装封装的硅互补式金属氧化物半导体(英文)》.pdf
《CECC 90 104- 125 ISSUE 1-1981 BS CECC 90 104-125 Silicon Complementary MOS with (B) Buffered Outputs and Cavity Packaging (En)《BS CECC 90 104-125 带(B)缓冲输出腔体封装封装的硅互补式金属氧化物半导体(英文)》.pdf》由会员分享,可在线阅读,更多相关《CECC 90 104- 125 ISSUE 1-1981 BS CECC 90 104-125 Silicon Complementary MOS with (B) Buffered Outputs and Cavity Packaging (En)《BS CECC 90 104-125 带(B)缓冲输出腔体封装封装的硅互补式金属氧化物半导体(英文)》.pdf(23页珍藏版)》请在麦多课文档分享上搜索。
1、KCECCtSO 104-125*IS*1 81 1974499 OOL0504 263 m BRITISH STANDARDS INSTITUTION 2 PARK STREET, LONDON. WIA 2BS Specification available from:- AS SHOWN IN PD 9002 AND CECC O0 200 AND ELECTRONIC COMPONENTS OF ASSESSED QUALITY DETAIL SPECIFICATION IN ACCORDANCE WITH: BS CECC 90 O00 : 1976 BS CECC 90 100 :
2、 1977 Outline not to scale: Isometric projection Marking information see page 7 For detail dimensions see IEC 191-2 (A50B) BS CECC 90 104 - 125 ISSUE 1 DECEMBER 1981 Page 1 of 23 pages MANUFACTURERS TYPE NUMBER 4030B SEE PD 9002 AND CECC O0 200 For ordering information see page 8 QUAD EXCLUSIVE-OR G
3、ATE SILICON COMPLEMENTARY MOS. WITH (B) BUFFERED OUTPUTS AND CAVITY PACKAGING. Assessment levels R, S, T and V and optional screening categories A, B, C and D CAUTION: THESE ARE STATIC SENSITIVE DEVICES - See clause 1.11 1. 1.1 1.2 1.3 1.4 Limiting conditions of use (not for inspection purposes) All
4、 voltages referenced to V ss Maximum supply voltage, positive Maximum supply voltage, negative Maximum positive input voltage Maximum negative input voltage +18 ,ov VI VDD +O,5V DD DD -0,5v -0 , 5V Refer to Qualified Products List PD 9002 and/or CECC O0 200 for details of manufacturers approved to t
5、his specification -1- BS CECC 90 104 - 125 Issue 1 Copyright CENELEC Electronic Components Committee Provided by IHS under license with CECCNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-kCECC*SO LOV-L25*IS*L 81 W 1774499 0010505 1TT W 1 200, omw 50, OmW 10,omA 10
6、,omA Limiting conditions of use (contd) I. 1.5 Maximum power dissipation, per package per output D1 D2 I II 1.6 Maximum continuous current into any input. 1.7 Maximum continuous current into any output * I 1.8 1 Operating temperature range T Full -55 to +125OC Limited -40 to + 85OC am- 1.9 1.10 Stor
7、age temperature range Transient energy rating -65 to +15OoC 400V at LOOpF through 1,5kSZ 1.11 1.11.1 I Recommended handling precautions Store devices in either conductive foam or conductive rails, or connect all leads together using a similar electrical shorting method. 1.11.2 1.11.3 1.11.4 1.11.5 U
8、se grounded tip soldering irons. Ground all test equipment. ss Connect all unused device inputs to VDD or V PC boards used to mount MOS devices should have all metal leads grounded during device mounting or flow soldering operations. 1.11.6 Soldering equipment, solder pots or flow soldering equipmen
9、t should be grounded whenever in contact with PC boards and/or MOS devices. 1.11.7 Do not use ungrounded automatic insertion equipment or other handling equipment that precludes the use of suitable device lead grounding techniques during inspection or handling. 1.11.8 When PC boards containing mount
10、ed MOS devices are removed from equipment for test, shipping or storage, Dummy connectors should be used to electrically short all PC board terminals together. 1.11.9 1.11.10 Switch off power supply before inserting or removing devices from circuits. Disconnect all low impedance equipment and input
11、signals from the device before d.c. power supplies are switched off. -2 BS CECC 90 104 - 125 Issue 1 Copyright CENELEC Electronic Components Committee Provided by IHS under license with CECCNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-kCECC*SO 104-125*IS*l 1 197
12、4499 0010506 036 2. Recommended conditions of use and associated characteristics (not for inspection purposes) These apply over the operating temperature range unless otherwise stated. Ail voltages referenced to V ss - Unit Characteristics DD (V v Conditions VIL = ov IH - DI) - Outputs open circuit
13、Symbol IDDA IDDA IDDA I DDA IDDA IDDA Tamb = 25OC 190 2,o 490 490 890 16,O 0,05 0,05 0,05 HIGH 30,O 60,O 120, o 30,O 60,O 120, o Quiescent device current Full temperature range 590 10,o i5,o 530 10, o 15,O 590 10,o 15,O 590 10,o 15,O Limited temperature range VIL = ov IH - DD - O, 05 0,05 0,05 LOW l
14、evel output voltage at IIoI 1,OriA 0,05 0,05 O, 05 4,95 9,95 14,95 o, 5 190 195 HIGH level output voltage at IIoI 1,OriA VIL = ov IH DD 4,95 9,95 14,95 4,95 9,95 14,95 OHB LOW level output voltage (for Worst case combinations) at IIo/ 1,OPA VIL = 1,5V VIL = 3,OV VIL = 4,ov 590 10,o 15,O HIGH level o
15、utput voltage (for worst case combinations) at IIoI 1,OriA VIH = 3,5v VIH = 7,ov VIH = l1,OV 5 ,o 10,o 15,O 495 990 L3,5 V V V 495 990 13,5 O, 51 1,30 3,40 O, 44 1,lO 3,OC - 4,5 990 13,5 O, 36 o, 90 2,40 O, 36 0,90 o t. n OHB Output LOW (sink) current Full temperature range mA mA mA mA mA Vo = 0,4V
16、vo = 0,5v Vo = 1,5V Vo = 0,4V Vo = 0,5V Vo = 1,5V 0,64 1,60 4,26 0,52 1,30 3,60 590 10,o 15,O 590 10,o 15,O IOLB IOLB IOLB IOLB IOLB IOLB Limited temperature range -3- BS LJXCYU LU4 - 125 Issue 1 Copyright CENELEC Electronic Components Committee Provided by IHS under license with CECCNot for ResaleN
17、o reproduction or networking permitted without license from IHS-,-,-kCECC*SO L04-L25*IS*L 81 m II974499 0010507 T72 m CL = 50pF (Test conditions as in Sub-group 15 1 I Characteristics Tamb HIGil 0,14 0,35 1,lO 0,12 0,30 l,oo 1,00 1,OO - 190 2,o 295 1,o 290 2,s Output HIGH (source) current Full tempe
18、rature range 1 Unit mA mA mA mA mA mA PA MA PF V V V V V V Limited temperature range 0,25 0,62 1,80 0,2 0,5 1,4 0,lO 0,30 Input leakage current 0, 0,5 1,5 0,16 0,40 1,20 0,lO 0,30 Full temperature range Limited temperature range - 1 ,o 2,o 2,s l,o 2,o 2,5 Input capacitance per unit load (Any input 1
19、 795 130 2,o 2,5 l,o 2,o 2,s Noise margin at LOW level output (equal to the difference between VIL and VOL for worst case combinations) Noise margin at HIGH level output (equal to the difference between VIH and VoH for worst case combinations) Propagation and Trans it ion Time 8 Conditions Vo = 4,6V
20、 Vo = 13,5V Vo = 4,6V Vo = 13,5V vo = 9,5v vo = 9,5v VIL = ov IH = DD VI = ov f - 1MHz I OHB OHB OHB OHB OHB OHB -I -I -I -I -I -I 5,0 10,o 15,O 590 10,o 15,O 15,o ILJ I 150 IA %LB %LB . NLB 5,o 10,o 15,o hm vNHB v“B 5,0 10,o 15,O LOW Tamb = 25C -4- BS CECC 90 104 - 125 Issue 1 Copyright CENELEC Ele
21、ctronic Components Committee Provided by IHS under license with CECCNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-kCECC*90 LOY-L25*IS*L 82 W 2974499 OOI10508 909 W Symbol t / PHLA tPLHA O DD(V) 5,O V LOW - 10,o - 15,O - Characteristics I Conditions t / THLA t Pro
22、pagation Delay Time HIGH to LOW and LOW to HIGH level any input to any output Transition Time HIGH to LOW and LOW to HIGH level - 5,O 10,o - 15,O - Input Capacitance I I d2-L Input Terminal identification A1 q p 11 JA- -*I Inspection requirements - IL - s-4 s-4 - s -3 s-3 - s-4 na - s -4 na Limits A
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